TLC6984中文资料48 个电流源，64 次扫描，共阴极矩阵 LED 显示驱动器数据手册TI规格书

描述 Description

With the pixel density getting higher in narrow pixel pitch LED display or mini and micro-LED products, there are urgent demands for LED drivers to address those critical challenges These challenges include ultra high integration to meet the strict board space limitation, ultra low power to minimize the system level power dissipation, new interface to enable high data refresh rate with low EMI impact, and excellent display performance to serve the growing needs of higher display quality.

The TLC6984 is a highly integrated common cathode matrix LED display driver with 48 constant current sources and 16 scanning FETs. Besides driving 16 × 16 and 32 × 32 RGB LED pixels as TLC6983, three TLC6984s are capable of driving 48 × 48 RGB LED pixels and stacking four TLC6984s can drive 64 × 64 RGB LED pixels. To achieve low power consumption, the device supports separated power supplies for the red, green, and blue LEDs by its common cathode structure. Furthermore, the operation power of the TLC6984 is significantly reduced by ultra-low operation voltage range (Vcc down to 2.5 V) and ultra-low operation current (Icc down to 3.6 mA).

The TLC6984 implements a high speed dual-edge transmission interface to support high device count daisy-chained and high refresh rate while minimizing electrical-magnetic interference (EMI). The device supports up to 25-MHz SCLK (external) and up to 160-MHz GCLK (internal). Meanwhile, the device integrates enhanced circuits and intelligent algorithms to solve the various display challenges in Narrow Pixel Pitch (NPP) LED display applications and mini and micro-LED products. These challenges include dim at the first scan line, upper and downside ghosting, non-uniformity in low grayscale, coupling, and caterpillar caused by open or short LEDs, which make the TLC6984 a perfect choice in such applications.

The TLC6984 also implements LED open and weak, short and short detections and removals during operations and can also report this information out to the accompanying digital processor.

特性 Features

• Separated VCC and VR/G/B power supply
• VR/G/B voltage range: 2.5 V–5.5 V
• 48 current source channels from 0.2 mA to 20 mA
• Low knee voltage: 0.26 V (max.) when IOUT = 5 mA
• 8-bits (256 steps) color brightness control
• 16 scan line switches with 190-mΩ RDS(ON)
• Independent VCC down to 2.5 V
• Intelligent power saving mode
• Built-in SRAM to support 1 – 64 multiplexing
• Dual devices stackable with 32 multiplexing to support 96 × 32 LEDs or 32 × 32 RGB pixels
• Four devices stackable with 64 multiplexing to support 192x64 LEDs or 64 × 64 RGB pixels
• High speed and low EMI Continuous Clock Series Interface (CCSI)
• External 25-MHz (max.) SCLK with dual-edge transmission mechanism (internal 50 MHz)
• Optimized display performance
• Upside and downside ghosting removal
• LED open, short, and weak short detection and removal