TL16C2552中文资料具有 16 字节 FIFO 的 1.8V 至 5V 双路 UART数据手册TI规格书

描述 Description

The TL16C2552 is a dual universal asynchronous receiver andtransmitter (UART). It incorporates the functionality of two TL16C550D UARTs, each UART having its own register set and FIFOs. The two UARTs share only the data bus interface and clock source, otherwise they operate independently. Another name for the UART function is Asynchronous Communications Element (ACE), and these terms will be used interchangeably. The bulk of this document describes the behavior of each ACE, with the understanding that two such devices are incorporated into the TL16C2552.
Each ACE is a speed and voltage range upgrade of the TL16C550C, which in turn is a functional upgrade of the TL16C450. Functionally equivalent to the TL16C450 on power up or reset (single character or TL16C450 mode), each ACE can be placed in an alternate FIFO mode. This relieves the CPU of excessive software overhead by buffering received and to be transmitted characters. Each receiver and transmitter store up to 16 bytes in their respective FIFOs, with the receive FIFO including three additional bits per byte for error status. In the FIFO mode, a selectable autoflow control feature can significantly reduce software overload and increase system efficiency by automatically controlling serial data flow using handshakes between the RTS output and CTS input, thus eliminating overruns in the receive FIFO.
Each ACE performs serial-to-parallel conversions on data received from a peripheral device or modem and stores the parallel data in its receive buffer or FIFO, and each ACE performs parallel-to-serial conversions on data sent from its CPU after storing the parallel data in its transmit buffer or FIFO. The CPU can read the status of either ACE at any time. Each ACE includes complete modem control capability and a processor interrupt system that can be tailored to the application.
Each ACE includes a programmable baud rate generator capable of dividing a reference clock with divisors of from 1 to 65535, thus producing a 16× internal reference clock for the transmitter and receiver logic. Each ACE accommodates up to a 1.5-Mbaud serial data rate (24-MHz input clock). As a reference point, that speed would generate a 667-ns bit time and a 6.7-µs character time (for 8,N,1 serial data), with the internal clock running at 24 MHz.
Each ACE has a TXRDY and RXRDY output that can be used to interface to a DMA controller.

特性 Features

• Programmable Auto-RTS andAuto-CTS
• In Auto-RTS Mode, RCV FIFO Contents, and Threshold Control RTS
• Capable of Running With All Existing TL16C450 Software
• Up to 24-MHz Clock Rate for up to 1.5-Mbaud Operation With VCC = 5 V
• Up to 16-MHz Clock Rate for up to 1-Mbaud Operation With VCC = 2.5 V
• In the TL16C450 Mode, Hold and Shift Registers Eliminate the Need for Precise Synchronization Between the CPU and Serial Data
• Standard Asynchronous Communication Bits (Start, Stop, and Parity) Added to or Deleted From the Serial Data Stream
• Independent Receiver Clock Input
• Fully Programmable Serial Interface Characteristics:
• Even-, Odd-, or No-Parity Bit Generation and Detection
• Baud Generation (dc to 1 Mbit/s)
• Complete Status Reporting Capabilities
• Line Break Generation and Detection
• Break, Parity, Overrun, and Framing Error Simulation
• Modem Control Functions (CTS, RTS, DSR, DTR, RI, and DCD)
• Each UART's Internal Register Set May Be Written Concurrently to Save Setup Time
• APPLICATIONS
• Gaming Terminals
• Router Control
• Factory Automation

简介

TL16C2552属于集成电路（IC）的UART（通用异步接收器发送器）。由TI制造生产的TL16C2552UART（通用异步接收器发送器）UART（通用异步接收器/发射器）接口是将来自微控制器或 CPU 的并行位转换为串行位以便进行传输，或将接收到的串行位转换为并行位以供其他微控制器或 CPU 使用的物理电路。UART 可以使用 RS232、RS422 或 RS485 协议进行数据传输，并根据通道数、数据速率和其他特性（例如内部振荡器、定时器、计数器、GPIO 和打印机端口）来选择。