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TDRV018-SW-25中文资料TEWS数据手册PDF规格书

TDRV018-SW-25
厂商型号

TDRV018-SW-25

功能描述

Reconfigurable FPGA with 24 x 16 bit Analog Input

文件大小

288.93 Kbytes

页面数量

3

生产厂商 TEWS Technologies GmbH
企业简称

TEWS

中文名称

TEWS Technologies GmbH官网

原厂标识
数据手册

下载地址一下载地址二到原厂下载

更新时间

2025-5-23 11:04:00

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TDRV018-SW-25规格书详情

Application Information

The TXMC638 is a standard single-width Switched Mezzanine Card (XMC) compatible module providing a user configurable Kintex-7 FPGA with 24 ADC input channels.

The TXMC638 ADC input channels are based on the Linear Dual 16-Bit 5Msps Differential LTC2323-16 ADCs. Each of the 24 channels has 16bit resolution and works with up to 5Msps. The analog input circuit is designed to allow input voltages up to ±2.5 V on each input-pin resulting in a ±5 V differential voltage range.

For customer specific I/O extension or inter-board communication, the TXMC638 provides 64 I/Os on P14 and 4 Multi-Gigabit-Transceiver on P16. The P14 I/O lines are connected directly to the FPGA and can be used as 64 single ended LVCMOS24 or as 32 differential LVDS25 interfaces. Additionally the TXMC638 provides three 100 Ohm terminated ac-coupled, differential inputs with wide Input voltage range.

All front I/O lines such as the ADC interface and the three 100 Ohm inputs are connected to a 98-pin. Samtec ERF8-049 Rugged EdgeRate Connector.

A 1GB, 32 bit wide DDR3 SDRAM is connected to the user FPGA. The SDRAM-Interface uses an internal Memory Controller of the Kintex-7.

The user FPGA is configured by a serial SPI flash. For full PCIe specification compliance, the XILINX Tandem Configuration Feature can be used for FPGA configuration. XILINX Tandem Methodologies “Tandem PROM” is the favored methodology. The SPI flash device is in-system programmable. An in-circuit debugging option is available via a JTAG header for read back and real-time debugging of the FPGA design (using Xilinx “ChipScope”).

User applications for the TXMC638 with Kintex-7 FPGA can be developed using the design software Vivado Design Suite. A license for the Vivado Design Suite design tool is required.

TEWS offers a well-documented FPGA Board Reference Design. It includes constraint file with all necessary pin assignments and basic timing constraints. The FPGA Board Reference Design covers the main functionalities of the TXMC638.

The TXMC638 is delivered with the FPGA Board Reference Design. The user FPGA can be programmed via the on-board Board Configuration Controller (BCC). Programming via the JTAG interface using an XILINX USB programmer is also possible. In accordance with the PCI specification and the buffering of PCI header data, the contents of the user FPGA can be changed during operation.

供应商 型号 品牌 批号 封装 库存 备注 价格
上和/SUNHOL
2016+
DIP
4000
只做原装,假一罚十,专营继电器!
询价
TE Connectivity(泰科电子)
23+
-
1701
原装现货/专做开关15年
询价
SUNHOLD
25+23+
DIP8
67291
绝对原装正品现货,全新深圳原装进口现货
询价
DIP
DIP-10
35560
一级代理 原装正品假一罚十价格优势长期供货
询价
上和/SUNHOL
1736+
DIP
8529
专营继电器只做原装正品假一赔十!
询价
24+
414
现货供应
询价
24+
N/A
65000
一级代理-主营优势-实惠价格-不悔选择
询价
dip
2021+
500
只做原装,可提供样品
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Tektronix
2022+
1
全新原装 货期两周
询价
TE/泰科
24+
12819
原厂现货渠道
询价