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TDRV004-SW-95中文资料TEWS数据手册PDF规格书

TDRV004-SW-95
厂商型号

TDRV004-SW-95

功能描述

Reconfigurable FPGA with 64 TTL I/O / 32 Diff. I/O

文件大小

123.31 Kbytes

页面数量

2

生产厂商 TEWS Technologies GmbH
企业简称

TEWS

中文名称

TEWS Technologies GmbH官网

原厂标识
数据手册

下载地址一下载地址二到原厂下载

更新时间

2025-6-24 22:58:00

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TDRV004-SW-95规格书详情

Application Information

The TPMC630 is a standard single-width 32 bit PMC module providing a user configurable FPGA with 300,000 (TPMC630-1x) or 600,000 (TPMC630-2x) system gates. All local signals from the PCI controller are routed to the FPGA.

The TPMC630-x0x has 64 ESD-protected TTL lines, the TPMC630-x1x provides 32 differential I/O lines using EIA-422 / EIA-485 compatible, ESD-protected line transceivers. The TPMC630-x2x provides 32 TTL and 16 differential I/Os. All lines are individually programmable as input or output. The receivers are always enabled, which allows determining the state of each I/O line at any time. This can be used as read back function for lines configured as outputs. Each TTL I/O line has a pull-up resistor. The pull-up voltage is selectable to be either +3.3V or +5V. The differential I/O lines are terminated by 120Ω resistors.

The FPGA is configured by a serial Flash. The Flash device is in-system programmable via driver software over the PCI bus. An in-circuit debugging option is available via an optionally mountable JTAG header (on the backside of the board) for readback and real-time debugging of the FPGA design (using Xilinx “ChipScope”).

A programmable clock generator supplies up to six different clock frequencies between 200 kHz and 166 MHz. All outputs are available at the FPGA, one clock source is in addition used as the local clock signal for the PCI controller. The clock generator settings are stored in an EEPROM and can be changed by the driver software through PCI9030 GPIO pins.

The configuration EEPROM of the PCI controller can also be modified by the driver software, to adapt address spaces etc.

User applications can be developed using the design software ISE WebPACK which can be downloaded free of charge from www.xilinx.com.

The TPMC630 provides front panel I/O via a HD68 SCSI-3 type connector and rear panel I/O via P14.

For First Time Users the Engineering Documentation TPMC630-ED is recommended. The Engineering Documentation includes TPMC630-DOC, schematics, data sheets / application notes of the components and well documented sample VHDL source code.

Software Support (TPMC630-SW-xx) for different operating systems is available.

供应商 型号 品牌 批号 封装 库存 备注 价格
上和/SUNHOL
2016+
DIP
4000
只做原装,假一罚十,专营继电器!
询价
24+
414
现货供应
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上和/SUNHOL
1736+
DIP
8529
专营继电器只做原装正品假一赔十!
询价
DIP
DIP-10
35560
一级代理 原装正品假一罚十价格优势长期供货
询价
SUNHOLD
25+23+
DIP8
67291
绝对原装正品现货,全新深圳原装进口现货
询价
台湾圜达DIP
20+
DIP
1025
原装现货
询价
DIPTRONICS
24+
原封装
1007
原装现货假一罚十
询价
Tektronix
5
全新原装 货期两周
询价
TE Connectivity(泰科电子)
23+
-
1701
原装现货/专做开关15年
询价
TE/泰科
24+
12819
原厂现货渠道
询价