TDP2044中文资料德州仪器数据手册PDF规格书

1 Features

• Supports DisplayPort 2.1 up to 20Gbps (UHBR20)

• Designed for USB-C DP only (no USB 3.x) source

or sink with integrated cross-point mux

• Protocol agnostic linear equalizer supporting most

AC coupled interfaces up to 20Gbps

• Excellent electrical performance at 20Gbps

(10GHz Nyquist):

– 19dB equalization

– 1.8V DC linearity, 1.08V AC linearity

– –15 / –16dB Rx / Tx return loss

– –60dB NEXT, –43dB FEXT cross talk

– 70fs low additive RJ with PRBS data

• Transparent to DisplayPort 1.4 and 2.1 link training

• Single 3.3V supply with 160mW/chan active power

• Internal voltage regulator provides immunity to

supply noise

• High linearity easing DP compliance ratio tests

• High BW resulting excellent linear EQ curves

• Pin-strap, I2C or EEPROM programming

– 18 EQ boost and 5 flat gain settings

• TDP2044: 0°C to 70°C commercial temperature

• TDP2044I: –40°C to 85°C industrial temperature

• 4mm × 6mm, 40 pin WQFN package

2 Applications

• Desktop PC or motherboard

• PC, notebooks, and tablets

• Docking stations

• TV, gaming, home theater, and entertainment

• Pro audio, video, and signage

• Test and measurement

• Medical

• Flat panel monitors

3 Description

The TDP2044 is a four-channel low-power highperformance

linear repeater or redriver with integrated

cross-point to support VESA USB Type-C™ Alt Mode

applications designed to support DisplayPort 2.1 up to

20Gbps.

The TDP2044 receivers deploy continuous time

linear equalizers (CTLE) to provide a programmable

high-frequency boost. The equalizer can open an

input eye that is completely closed due to intersymbol

interference (ISI) induced by an interconnect

medium, such as PCB traces or cables. The linear

data-paths of TDP2044 preserve transmit preset

signal characteristics. High bandwidth, low channelto-

channel cross-talk, low additive jitter and excellent

return loss makes the device almost a passive

element in the link, but with useful equalization. The

DisplayPort link training is effective through the linear

redriver that becomes part of the passive channel in

between source Tx and sink Rx. This transparency in

the link training protocol results in optimum electrical

link and lowest possible latency. The data-path of the

device uses an internally regulated power rail that

provides high immunity to any supply noise on the

board.

The device also has low AC and DC gain variation

providing consistent equalization in high volume

platform deployment.