TDA8029C2中文资料Low power single card reader数据手册恩XP规格书

描述 Description

General description
The TDA8029 is a complete one chip, low cost, low power, robust smart card reader. Its different power reduction modes and its wide supply voltage range allow its use in portable equipment. Due to specific versatile hardware, a small embedded software program allows the control of most cards available in the market. The control from the host may be done through a standard serial interface. The TDA8029 may be delivered with standard embedded software, or be masked with specific customer code. For details on software development and on available tools, please refer to application notes “AN01009” and “AN10134” for the TDA8029HL/C1. For standard embedded software, please refer to “AN10206” for the TDA8029HL/C2.

特性 Features

■ 80C51 core with 16 kB ROM, 256 byte RAM and 512 byte XRAM
■ Specific ISO7816 UART, accessible with MOVX instructions for automatic convention processing, variable baud rate, error management at character level for T = 0 and T = 1 protocols, extra guard time, etc.
■ Specific versatile 24-bit Elementary Time Unit (ETU) counter for timing processing
during Answer To Reset (ATR) and for T = 1 protocol
■ VCC generation with controlled rise and fall times:
   ◆ 5 V ± 5 %, maximum current 65 mA
   ◆ 3 V ± 5 %, maximum current 50 mA; maximum current 65 mA if VDD 3 V
   ◆ 1.8 V ± 5 %, maximum current 30 mA
■ Card clock generation up to 20 MHz with three times synchronous frequency doubling (fXTAL, 1⁄2fXTAL, 1⁄4fXTAL and 1⁄8fXTAL)
■ Card clock stop HIGH or LOW or 1.25 MHz from an integrated oscillator for card power reduction modes
■ Automatic activation and deactivation sequences through an independent sequencer
■ Supports asynchronous protocols T = 0 and T = 1 in accordance with:
   ◆ ISO 7816 and EMV 3.1.1 (TDA8029HL/C1 and TDA8029HL/C2)
   ◆ ISO 7816 and EMV 2000 (TDA8029HL/C2).
■ 1 to 8 characters FIFO in reception mode
■ Parity error counter in reception mode and in transmission mode with automatic retransmission
■ Versatile 24-bit time-out counter for ATR and waiting times processing
■ Specific ETU counter for Block Guard Time (BGT) (22 ETU in T = 1 and 16 ETU in T = 0)