TDA8026中文资料恩XP数据手册PDF规格书

General description

The TDA8026 is a cost-effective, analog interface for addressing multiple smart card slots in a Point Of Sales (POS) terminal. It can address up to two main cards (synchronous or asynchronous smart cards supported) and up to four Security Access Modules (SAMs). Its packaging supports the latest payment terminal security requirements.

Features and benefits

I2C-bus controlled IC card interface in a TFBGA64 package

Supply voltage between 2.7 V and 5.5 V

Dedicated microcontroller interface supply voltage (VDD(INTF))

Shutdown mode ensures very low power consumption when the TDA8026 is inactive

Programmable power reduction modes triggered when the card slots are inactive

VCC(n) generation via DC-to-DC converter: two card slots can be fully loaded, the three others in reduced consumption mode

Two clock input pins: CLKIN1 for card slot 1 and CLKIN2 for card slots 2 to 5

Two transparent I/O lines on microcontroller side, one for card slot 1 and the other for card slots 2 to 5

Five protected, half-duplex, bidirectional, buffered I/O lines with current limitation at  15 mA and a maximum frequency 1 MHz

Two I2C-bus controlled auxiliary I/O lines

VCC(n) regulation on all card slots at ICC  55 mA:

5 V, 3 V or 1.8 V ± 5 %

Current spikes of 40 nAs up to 20 MHz for 5 V cards with controlled rise and fall times

Current limitation of approximately 100 mA

Thermal protection and short-circuit protection on all card contacts

Automatic activation and deactivation sequences initiated by the software or hardware in the event of a short-circuit, card take-off or voltage drop-out for VDD(INTF), VDD or VUP

Enhanced ElectroStatic Discharge (ESD) protection on the card-side up to 6 kV

20 MHz clock input

Card clock generation up to 20 MHz and dividable by 1, 2, 4 or 5 with synchronous frequency changes:

Stop, HIGH or LOW

Clock frequency between 1 MHz and 2.2 MHz in card low-power mode

Current limitation on pin CLK(n)

RST(n) signal lines with current limitation at 20 mA, controlled by an embedded programmable clock pulse counter on asynchronous cards or by a register on synchronous cards

ISO 7816-3 and EMV 4.31 payment systems compatibility

VDD(INTF) supply voltage supervisor ensures correct communication between microcontroller and circuit; threshold internally fixed or set using an external resistor bridge

VDD supply voltage supervisor for spike suppression during power-on and emergency deactivation at power-off; threshold internally fixed

Card presence input with a 17.8 ms (typical) built-in debouncing system on card slots 1 and 2

One interrupt signal (IRQN)

Applications

Point Of Sale terminals

Multiple SAM contact readers