TDA10046HT中文资料飞利浦数据手册PDF规格书

The TDA10046HT performs all DVB-T channel decoding functions from IF input to transport stream output, using an internal DSP core for synchronization and control.Thanks to its sharp adjacent channel digital ilter, this single-chip receiver achieves excellent performance with low cost tuners (one SAW only). It requires only a low cost crystal oscillator (4 MHz) as a clock source, which can be shared with the tuner.

Key features

• 2K and 8K COFDM demodulator, fully ETS 300-744 compliant

• TPS and Cell Identiier I2C-bus readable

• 2nd or 1st IF analog input

• On chip 10-bit ADC and PLL

• Single or dual AGC loop (with programmable takeover point)

• Adjacent channel digital iltering (only one external SAW ilter is required)

• Automatic frequency offset detection (±1, 2 or 3 standard offsets)

• Dynamic FFT window positioning, and adaptive echo equalization

• Consolidated algorithm for impulsive noise reduction

• DSP based synchronization enables on the ly irmware upgrades

• No extra-host software required

• Fast UHF/VHF band scanning

• Simultaneous tri-state parallel and serial Transport Stream interfaces

• 4 GPIO pins with ∑∆

• I2C-bus interface

• 5V tolerant I/O pins

• Low power consumption (450mW)

• TQFP64 package, CMOS 0.18 µm technology

Applications

• Integrated Digital TV (iDTV)

• Set-Top-Boxes (STB)

• Personal Video Recorder (PVR) with DVB-T reception

• Digital TV PCI card for Personal Computers