TCAN857DRBRQ1中文资料德州仪器数据手册PDF规格书

1 Features

• AEC-Q100 Qualified for automotive applications

– Human body model (HBM) ESD protection:

±12KV for CANH and CANL pins as per

AEC Q100-002

– Charged-device model (CDM) ESD protection:

±500V as per AEC Q100-011

– IEC 61000-4-2 Contact discharge: ±8KV

(unpowered)

• Compatible with ISO 11898-2:2024 physical layer

standard

• Functional Safety-Capable

– Documentation available to aid in functional

safety system design

• Support of classical CAN and optimized CAN FD

performance at 2Mbps and 5Mbps

– Short and symmetrical propagation delays for

enhanced timing margin

• TCAN857V-Q1 I/O voltage range supports 2.9V to

5.25V

• Support for 12V battery applications

• Receiver common mode input voltage: ±12V

• Protection features:

– Bus fault protection: ±40V

– Undervoltage protection

– TXD-dominant time-out (DTO)

– Thermal-shutdown protection (TSD)

• Operating modes: Normal and Silent

• Optimized behavior when unpowered

– Bus and logic pins are high impedance (no load

to operating bus or application)

– Hot-plug capable: power up/down glitch free

operation on bus and RXD output

• 8-Pin SOIC, small footprint SOT-23 and leadless

VSON-8 package with improved automated optical

inspection (AOI) capability

2 Applications

• Automotive and transportation

– Body control modules

– Automotive gateway

– Advanced driver assistance system (ADAS)

– Infotainment

3 Description

The TCAN857-Q1 is a high speed controller area

network (CAN) transceiver that meets the physical

layer requirements of the ISO 11898-2:2024 highspeed

CAN specification. The transceiver is designed

for classical CAN and CAN FD networks up to 5

megabits per second (Mbps).

The transceiver supports two modes of operation;

normal mode and silent mode. The transceiver also

includes many protection and diagnostic features

including thermal shutdown (TSD), TXD-dominant

timeout (DTO), and bus fault protection up to ±40V.

The device has defined fail-safe behavior in supply

under-voltage or floating pin scenarios.

The transceiver features an integrated level shifter

on the VIO pin which supplies internal logic-level

translation for interfacing the transceiver I/Os directly

to 3.3V, or 5V logic level. These transceivers are

not only available in industry-standard SOIC-8 and

VSON-8 packages, but also have a space-saving

small footprint SOT-23 package option.