TC7MP245FTG中文资料东芝数据手册PDF规格书

Low-Voltage/Low-Power Octal Bus Transceiver with Bus-hold

The TC7MP245 is a high-performance CMOS octal bus transceiver. By a low power consumption circuit, power consumption has been reduced when a bus terminal is disable state (OE=High).

The direction of data transmission is determined by the level of the DIR input. The OE input can be used to disable the device so that the busses are effectively isolated.

But, bus of a B bus side at floating state is maintained in an appropriate logic level due to a bus hold circuit to a B bus. Moreover, the bus-hold circuit which is added to a B bus is off when OE is low.

All inputs are equipped with protection circuits against static discharge.

特性 Features

• Low-voltage operation : VCC = 1.65 to 3.6 V

• Low power current consumption : By a new input circuit, power consumption in OE=H is reduced largely.

It is most suitable for battery drive products such as personal digital

assistant or a cellular phone.

• Quiescent supply current : ICC = 5μA(max)(Vcc=3.6V)

• High-speed operation : tpd=3.0ns(max)(Vcc=3.3±0.3V)

tpd=4.6ns(max)(Vcc=2.5±0.2V)

tpd=10.0ns(max)(Vcc=1.8±0.15V)

• Output current : IOHA/IOLA(A bus)=±12mA(min)(VCC=3.0V)

: IOHB/IOLB(B bus)=±24mA(min)(VCC=3.0V)

• Latch-up performance : ±300mA

• ESD performance : Machine model ≥ ±200 V

Human body model ≥ ±2000 V

• Ultra-small package : VSSOP(US20), VQON20

• Bus hold circuit is built in only the B bus side.(Only in OE=H, a former state is maintained.)

• Floating of A-bus and B-bus are permitted.(When OE=H)

• Gate IC for control(TC7MP01FK) of DIR and OE terminal are prepared.

• 3.6V tolerant function provided on A-bus terminal, DIR and OE terminal.