首页 >TC74LVX74FT(ELM)>规格书列表
| 零件编号 | 下载 订购 | 功能描述/丝印 | 制造商 上传企业 | LOGO |
|---|---|---|---|---|
LowVoltageDualD-TypePositiveEdge-TriggeredFlip-Flop | FairchildFairchild Semiconductor 仙童半导体飞兆/仙童半导体公司 | Fairchild | ||
LOWVOLTAGECMOSDUALD-TYPEFLIPFLOPWITHPRESETANDCLEAR(5VTOLERANTINPUTS) DESCRIPTION The74LVX74isalowvoltageCMOSDUALD-TYPEFLIP-FLOPWITHPRESETANDCLEARNONINVERTINGfabricatedwithsub-micronsilicongateanddouble-layermetalwiringC2MOStechnology.Itisidealforlowpower,batteryoperatedandlownoise3.3Vapplications. ■HIGHSPEED:fMAX=145MHz | STMICROELECTRONICSSTMicroelectronics 意法半导体意法半导体集团 | STMICROELECTRONICS | ||
LowVoltageDualD-TypePositiveEdge-TriggerednullFlip-Flop | ONSEMION Semiconductor 安森美半导体安森美半导体公司 | ONSEMI | ||
LowVoltageDualD-TypePositiveEdge-TriggeredFlip-Flop GeneralDescription TheLVX74isadualD-typeflip-flopwithAsynchronousClearandSetinputsandcomplementary(Q,Q)outputs.Informationattheinputistransferredtotheoutputsonthepositiveedgeoftheclockpulse.AftertheClockPulseinputthresholdvoltagehasbeenpassed,theData | FairchildFairchild Semiconductor 仙童半导体飞兆/仙童半导体公司 | Fairchild | ||
LowVoltageDualD-TypePositiveEdge-TriggeredFlip-Flop | FairchildFairchild Semiconductor 仙童半导体飞兆/仙童半导体公司 | Fairchild | ||
LowVoltageDualD-TypePositiveEdge-TriggeredFlip-Flop GeneralDescription TheLVX74isadualD-typeflip-flopwithAsynchronousClearandSetinputsandcomplementary(Q,Q)outputs.Informationattheinputistransferredtotheoutputsonthepositiveedgeoftheclockpulse.AftertheClockPulseinputthresholdvoltagehasbeenpassed,theData | FairchildFairchild Semiconductor 仙童半导体飞兆/仙童半导体公司 | Fairchild | ||
LowVoltageDualD-TypePositiveEdge-TriggerednullFlip-Flop | ONSEMION Semiconductor 安森美半导体安森美半导体公司 | ONSEMI | ||
LowVoltageDualD-TypePositiveEdge-TriggerednullFlip-Flop | ONSEMION Semiconductor 安森美半导体安森美半导体公司 | ONSEMI | ||
LowVoltageDualD-TypePositiveEdge-TriggeredFlip-Flop | FairchildFairchild Semiconductor 仙童半导体飞兆/仙童半导体公司 | Fairchild | ||
LowVoltageDualD-TypePositiveEdge-TriggeredFlip-Flop GeneralDescription TheLVX74isadualD-typeflip-flopwithAsynchronousClearandSetinputsandcomplementary(Q,Q)outputs.Informationattheinputistransferredtotheoutputsonthepositiveedgeoftheclockpulse.AftertheClockPulseinputthresholdvoltagehasbeenpassed,theData | FairchildFairchild Semiconductor 仙童半导体飞兆/仙童半导体公司 | Fairchild |
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