74HC74

DualDFlip?묯lopwithSetandResetHigh?뭁erformanceSilicon?묰ateCMOS

The74HC74isidenticalinpinouttotheLS74.ThedeviceinputsarecompatiblewithstandardCMOSoutputs;withpullupresistors,theyarecompatiblewithLSTTLoutputs. ThisdeviceconsistsoftwoDflip−flopswithindividualSet,Reset,andClockinputs.InformationataD−inputistransferred

74HC74

DualD-typeflip-flopwithsetandreset;positive-edgetrigger

GENERALDESCRIPTION The74HC/HCT74arehigh-speedSi-gateCMOSdevicesandarepincompatiblewithlowpowerSchottkyTTL(LSTTL).TheyarespecifiedincompliancewithJEDECstandardno.7A. FEATURES •Outputcapability:standard •ICCcategory:flip-flops

74HC74

DualD-typeflip-flopwithsetandreset;positiveedge-trigger

1.Generaldescription The74HC74and74HCT74aredualpositiveedgetriggeredD-typeflip-flop.Theyhaveindividual data(nD),clock(nCP),set(nSD)andreset(nRD)inputs,andcomplementarynQandnQoutputs. DataatthenD-input,thatmeetstheset-upandholdtimerequirementsontheLOW-

74HC74

HighSpeedCMOSLogic

74HC74

DualD-typeflip-flopwithsetandreset;positiveedge-trigger

74HC74

HighSpeedCMOSLogic

74HC74

HighSpeedCMOSLogic

Features OutputDriveCapability:10LSTTLLoads OutputsDirectlyInterfacetoCMOS,NMOS,andTTL LowInputCurrent:1μA AsynchronousSet-ResetCapability ±4mAOutputDriveat5V OperatingVoltageRange:2.0to6.0V Directdrop-inreplacementforobsoletecomponents inlongtermprograms

74HC74A

DualDFlip-FlopwithSetandReset

74HC74AF

DualD-TypeFlipFlopPresetandClear

Features •Highspeed:fmax=77MHz(typ.)atVCC=5V •Lowpowerdissipation:ICC=2µA(max)atTa=25°C •Highnoiseimmunity:VNIH=VNIL=28VCC(min) •Outputdrivecapability:10LSTTLloads •Symmetricaloutputimpedance:|IOH|=IOL=4mA(min) •Balancedpropagationdelays:

74HC74AP

DualD-TypeFlipFlopPresetandClear