TC74AC139P中文资料东芝数据手册PDF规格书

Dual 2-to-4 Line Decoder

The TC74AC139 is an advanced high speed CMOS 2-to-4 LINE DECODER fabricated with silicon gate and double-layer metal wiring C2MOS technology.

It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation.

The active low enable input can be used for gating or it can be used as a data input for demultiplexing applications.

特性 Features

• High speed: tpd = 5.9 ns (typ.) at VCC = 5 V

• Low power dissipation: ICC = 8 μA (max) at Ta = 25°C

• High noise immunity: VNIH = VNIL = 28 VCC (min)

• Symmetrical output impedance: |IOH| = IOL = 24 mA (min) Capability of driving 50 Ω transmission lines.

• Balanced propagation delays: tpLH ∼ − tpHL

• Wide operating voltage range: VCC (opr) = 2 V to 5.5 V

• Pin and function compatible with 74F139