TC74AC125P中文资料东芝数据手册PDF规格书

TC74AC125P/F/FN/FT Quad Bus Buffer

TC74AC126P/F/FN Quad Bus Buffer

The TC74AC125/126 are advanced high speed CMOS QUAD BUS BUFFERs fabricated with silicon gate and double-layer metal wiring C2MOS technology.

They achieve the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation.

The TC74AC125 requires the 3-state control input G to be set high to place the output into the high impedance state, whereas the TC74AC126 requires the control input to be set low to place the output into high impedance.

All inputs are equipped with protection circuits against static discharge or transient excess voltage.

特性 Features

• High speed: tpd = 4.0 ns (typ.) at VCC = 5 V

• Low power dissipation: ICC = 8 μA (max) at Ta = 25°C

• High noise immunity: VNIH = VNIL = 28 VCC (min)

• Symmetrical output impedance: |IOH| = IOL = 24 mA (min) Capability of driving 50 Ω transmission lines.

• Balanced propagation delays: tpLH ∼ − tpHL

• Wide operating voltage range: VCC (opr) = 2 to 5.5 V

• Pin and function compatible with 74F125/126