TC74AC112FN中文资料东芝数据手册PDF规格书

厂商型号	TC74AC112FN
功能描述	DUAL J-K FLIP FLOP WITH PRESET AND CLEAR
文件大小	277.89 Kbytes
页面数量	7 页
生产厂商	Toshiba Semiconductor
企业简称	TOSHIBA【东芝】
中文名称	株式会社东芝官网
原厂标识
数据手册	下载地址一下载地址二到原厂下载
更新时间	2025-7-4 20:28:00
人工找货	TC74AC112FN价格和库存，欢迎联系客服免费人工找货

Dual J-K Flip Flop with Preset and Clear

The TC74AC112 is an advanced high speed CMOS DUAL J-K FLIP FLOP fabricated with silicon gate and double-layer metal wiring C2MOS technology.

It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation.

Features

• High speed: fmax = 170 MHz (typ.) at VCC = 5 V

• Low power dissipation: ICC = 4 μA (max) at Ta = 25°C

• High noise immunity: VNIH = VNIL = 28 VCC (min)

• Symmetrical output impedance: |IOH| = IOL = 24 mA (min) Capability of driving 50 Ω transmission lines.

• Balanced propagation delays: tpLH ∼ − tpHL

• Wide operating voltage range: VCC (opr) = 2 to 5.5 V

• Pin and function compatible with 74F112

型号：
TC74AC112FN
制造商：
TOSHIBA
制造商全称：
Toshiba Semiconductor
功能描述：
CMOS Digital Integrated Circuit Silicon Monolithic Dual J-K Flip Flop with Preset and Clear