TC6320中文资料N/P-Channel Enhancement-Mode Dual MOSFET Pair数据手册Microchip规格书

描述 Description

TC6320 consists of high voltage, low threshold N-channel and P-channel MOSFETs in 8-Lead SOIC and DFN packages. Both MOSFETs have integrated GATE-to-SOURCE resistors and GATE-to-SOURCE Zener diode clamps which are desired for high voltage pulser applications. It is a complementary, high-speed, high voltage, GATE-clamped N- and P-channel MOSFET pair, which utilizes an advanced vertical DMOS structure and well-proven silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and with the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, this device is free from thermal runaway and thermally induced secondary breakdown. Vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired.

特性 Features

• Integrated GATE-to-SOURCE resistor
• Integrated GATE-to-SOURCE Zener diode
• Low threshold
• Low on-resistance
• Low input capacitance
• Fast switching speeds
• Free from secondary breakdown
• Low input and output leakage
• Independent, electrically isolated N- and P-channels