TC55417P-35中文资料东芝数据手册PDF规格书

DESCRIPTION

The TC55417P/J is a 65,536 bit high speed static random access memory organized as

16,384 words by 4 bits using CMOS technology, and operated from a single 5-volt supply.

Toshiba's high performance device technology provides both high speed and low power

features with a maximum access time of 25ns/35ns/45ns and maximum operating current of

120mA/100mA/100mA at maximum cycle time. The TC55417P/J also features an automatic

stand-by mode. When deselected by Chip Enable (CE), the operating current is reduced

to 20mA. The TC55417P/J is suitable for use in cache memory and high speed storage,

where high speed/high density are required. The TC55417P/J is moulded in a 24 pin

standard plastic DIP and a 24 pin plastic SOJ, with 0.3 inch width for high density.

assembly. The TC55417P/J is fabricated with ion implanted CMOS silicon gate MOS tech-

nology for high performance and high reliability.

FEATURES

. Fast access time: TC55417P/J-25

TC55417P/J-35

TC55417P/J-45

.

Low power dissipation:

25ns (MAX.)

35ns (MAX.)

45ns (MAX.)

Operation TC55417P/J-25

TC55417P/J-35

TC55417P/J-45

Standby

5V single power supply

Fully static operation

Directly TTL compatible: All Input and Output

Output buffer control: ÖE

Package: 24 Pin plastic 300 mil DIP (TC55417P)

24 Pin plastic 300 mil SOJ (TC55417J)

120mA (MAX.)

100mA (MAX.)

100mA (MAX.)

20mA (MAX.)