TC554161FTL_V01中文资料东芝数据手册PDF规格书

DESCRIPTION

The TC554161FTL is a 4,194,304-bit static random access memory (SRAM) organized as 262,144 words by 16

bits. Fabricated using Toshiba's CMOS Silicon gate process technology, this device operates from a single 5 V

± 10 power supply. Advanced circuit technology provides both high speed and low power at an operating

current of 10 mA/MHz (typ) and a minimum cycle time of 70 ns. It is automatically placed in low-power mode

at 100 μA standby current (max) when chip enable (CE) is asserted high. There are two control inputs. CE is

used to select the device and for data retention control, and output enable (OE) provides fast memory access.

Data byte control pin (LB, UB) provides lower and upper byte access. This device is well suited to various

microprocessor system applications where high speed, low power and battery backup are required. The

TC554161FTL is available in a plastic 54-pin thin-small-outline package (TSOP).

FEATURES

• Low-power

dissipation

Operating: 55 mW/MHz (typical)

• Standby current of 100 A (maximum)

Single power supply voltage of 5 V ± 10

Power down features using CE.

Data retention supply voltage of 2 to 5.5 V

Direct TTL compatibility for all inputs and

outputs

Access Times (maximum):

Access Time

CE Access Time

OE Access Time

-70

70 ns

70 ns

35 ns

TC554161FTL

-85

85 ns

85 ns

45 ns

-10

100 ns

100 ns

50 ns

Package:

TSOP II 54-P-400-0.80 (FTL) (Weight: 0.55 g typ)