TC55257CSPL-70L中文资料东芝数据手册PDF规格书

描述 Description

The TC55257CPL is a 262,144 bit CMOS static random access memory organized as 32,768 words by 8 bits and operated from

a single 5V power supply. Advanced circuit techniques provide both high speed and low power features with an operating current of

5mA/MHz (typ.) and a minimum cycle time of 70ns.

When CE is a logical high, the device is placed in a low power standby mode in which the standby current is 2uA at room tem-

perature. The TC55257CPL has two control inputs. Chip enable (CE) allows for device selection and data retention control, while

an output enable input (OE) provides fast memory access. The TC55257CPL is suitable for use in microprocessor systerns where

high speed, low power, and battery backup are required.

The TC55257CPL is offered in a standard dual-in-line 28-pin plastic package (0.6/0.3 inch width), a small outline plastic pack-

age, and a thin small outine plastic package (forward type, reverse type).

特性 Features

• Low power dissipation:

Standby current:

Single 5V power supply

Access time (max.)

Access Time

CE Access Time

OE Access Time

27.5mW/MHz (typ.)

2μA (max.) at Ta = 25°C

TC55257CPL/CFL/CSPL/CFTL/CTRL

-85L

85ns

85ns

45ns

-70L

70ns

70ns

35ns

-10L

100ns

100ns

50ns

2.0 -5.5V

Power down feature:

CE

Data retention supply voltage:

Inputs and outputs TTL compatible

• Package

TC55257CPL

: DIP28-P-600

TC55257CFL

: SOP28-P-450

TC55257CSPL : DIP28-P-300B

TC55257CFTL: TSOP28-P

TC55257CTRL : TSOP28-P-A