TC110G-05中文资料PDF规格书
TC110G-05规格书详情
General
Toshiba CMOS Gate Array family, TC11 OG Series,
with interconnect routing which is not confined to
routing channels. This technique increases silicon
efficiency (functions/mm2
).
Higher density and Toshiba HC2MOS process
provide subnanosecond speeds of 0.6ns typical gate
delays (2-input NAND gate, fanout=2, tpd.). TC110G
Series is introduced as 14 base arrays with 1 .4K to
50K estimated usable gates.
Gate Array design using TC 11 OG Series is supported
by the TOSHIBA MAINFRAME CAD SYSTEM.
Hierarchical designs with large macro capabilites
Features
Proprietary 1.5μm HC2MOS/VLSI process technology.
•0.6ns speed (2-input NAND gate, fanout = 2, tpd.)
Achieves ultra high speed equivalent to 10K ECL.
High packing density up to 129K raw gates.
3K to 129K raw gates.
Up to 256 110 pins.
Variable channel width architecture allows efficient silicon utilization.
Full input/output TTL/CMOS compatibility.
Advanced packaging techniques.
Design is fully supported by TOSHIBA MAINFRAME CAD SYSTEM
Programmable I/O cells with siew rate control (e.g. Output drive up to 12mA).
Large macro capability (e.g. RAMs, ROMs, Megafunctions, Megacells* ).
Performance optimization (e.g. Standard/High drive cells).
供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
---|---|---|---|---|---|---|---|
TOS |
22+23+ |
PLCC |
36942 |
绝对原装正品全新进口深圳现货 |
询价 | ||
TOSHIBA |
2024+ |
PLCC |
50000 |
原装现货 |
询价 | ||
TOSHIBA/东芝 |
21+ |
QFP-64L |
15000 |
原厂VIP渠道,亚太地区一级代理商,可提供更多数量! |
询价 | ||
TOSHIBA/东芝 |
24+ |
DIP |
990000 |
明嘉莱只做原装正品现货 |
询价 | ||
TOSHIBA/东芝 |
22+ |
DIP |
12000 |
只做原装、原厂优势渠道、假一赔十 |
询价 | ||
TOS |
21+ |
PLCC |
35200 |
一级代理分销/放心采购 |
询价 | ||
TOSHIBA |
2020+ |
QFP |
80000 |
只做自己库存,全新原装进口正品假一赔百,可开13%增 |
询价 | ||
TOSHIBA/东芝 |
PLCC84 |
28533 |
原盒原标,正品现货 诚信经营 价格美丽 假一罚十! |
询价 | |||
Toshiba |
19 |
公司优势库存 热卖中!! |
询价 | ||||
TOSHIBA |
20+ |
QFP |
500 |
样品可出,优势库存欢迎实单 |
询价 |