T14L1024A-10J数据手册TM中文资料规格书

描述 Description

GENERAL DESCRIPTION
The T14L1024A is a one-megabit density, fast static random access memory organized as 131,072 words by 8 bits. It is designed for use in high performance memory applications such as main memory storage and high speed communication buffers. Fabricated using high performance CMOS technology, access times down to 10ns are achieved.
Memory expansion by banking is easily accomplished using the chip enable pins CE1 and CE2. This device is packaged in a standard 32-pin 300 mil DIP/SOJ and 32-pin SOP/TSOP-I.FEATURES
• Fast Address Access Times : 10/12/15ns
• Single 3.3V ±0.3V power supply
• Low Power Consumption : 110/105/100mA
• TTL I/O compatible
• 2.0V data retention mode
• Automatic power-down when deselected
• Available packages :
   32-pin 300 mil DIP/SOJ & 32-pin SOP/TSOP-I
• Industry Standard Pin Assignment

特性 Features

• Fast Address Access Times : 10/12/15ns
• Single 3.3V ±0.3V power supply
• Low Power Consumption : 110/105/100mA
• TTL I/O compatible
• 2.0V data retention mode
• Automatic power-down when deselected
• Available packages :
   32-pin 300 mil DIP/SOJ & 32-pin SOP/TSOP-I
• Industry Standard Pin Assignment