2.5GHz ANY DIFF. IN-TO-LVPECL PROGRAMMABLE CLOCK DIVIDER

文件：163.63 Kbytes 页数：10 Pages

MICREL

麦瑞半导体

2.5GHz ANY DIFF. IN-TO-LVPECL PROGRAMMABLE CLOCK DIVIDER

文件：163.63 Kbytes 页数：10 Pages

MICREL

麦瑞半导体

Multiplexers Products

The SY89871UMG is a 2.5V/3.3V LVPECL output precision clock divider capable of accepting a high-speed differential clock input (AC or DC-coupled) CML, LVPECL, HSTL or LVDS clock input signal and dividing down the frequency using a programmable divider ratio to create a frequency locked lower speed v ·Two matched-delay outputs:·Bank A: undivided pass-through (QA)\n·Bank B: programmable divide by 2, 4, 8, 16 (QB0, QB1)\n\n·Matched delay: all outputs have matched delay, independent of divider setting\n·Guaranteed AC performance:·>2.5GHz fMAX\n·<250ps tr/tf\n·<670ps tpd (matched delay)\n·<15ps with;

Microchip

微芯科技

Package：16-VFQFN 裸露焊盘，16-MLF®；包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 类别：集成电路（IC） 时钟缓冲器，驱动器 描述：IC CLK BUFFER 1:3 2.5GHZ 16MLF

MICROCHIP

微芯科技

Package：16-VFQFN 裸露焊盘，16-MLF®；包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 类别：集成电路（IC） 时钟缓冲器，驱动器 描述：IC CLK BUFFER 1:3 2.5GHZ 16MLF

MICROCHIP

微芯科技