SY89420VJCTR中文资料麦瑞半导体数据手册PDF规格书

DESCRIPTION

The SY89420V device consists of two identical, low jitter, digital Phase Locked Loops based on Micrel-Synergys differential PLL technology. Each of the PLLs (PLLA and PLLB) is capable of operating in the 30MHz to 560MHz input reference frequency range independently of the other and is configurable separately. The PLLs can be configured to be matched in all regards, or can be configured so that PLLB is used as a frequency doubler, while PLLA is used to regenerate the undoubled frequency.

FEATURES

■ 3.3V and 5V power supply options

■ 1.12GHz maximum VCO frequency

■ 30MHz to 560MHz reference input operating frequency

■ Frequency doubler mode

■ Low jitter design

■ PECL differential outputs

■ PECL and TTL reference voltages available

■ External loop filter optimizes performance/cost

■ Available in 28-pin PLCC package

APPLICATIONS

■ Workstations

■ Advanced communications

■ High-end consumer

■ High-performance computing