SY89202U数据手册集成电路（IC）的时钟缓冲器驱动器规格书PDF

描述 Description

The SY89202U is a precision, high-speed, integrated clock divider LVPECL fanout buffer capable of handling clocks up to 1.5GHz. Optimized for communications applications, the three independently controlled output banks are phase matched and can be configured for pass-through (÷1), ÷2 or ÷4 divide ratios.The differential input includes Micrel's unique, 3-pin input termination architecture that allows the user to interface to any AC- or DC-coupled signal as small as 100mV (200mVpp) without any level shifting or termination resistor networks in the signal path. The low skew, low jitter outputs are 800mV, 100k compatible LVPECL, with extremely fast rise/fall times guaranteed to be less than 220ps.The EN (enable) input guarantees that the ÷1, ÷2 and ÷4 outputs will start from the same state without any runt pulse after an asynchronous MR (master reset) is asserted. This is accomplished by enabling the outputs after a four-clock delay to allow the counters to synchronize.The SY89202U is part of Micrel's Precision Edge® product family.

特性 Features

• Three low-skew LVPECL output banks with programmable ÷1, ÷2 and ÷4 divider options
• Three independently programmable output banks
• Guaranteed AC performance over temp and voltage:
• >1.5GHz clock frequency (fMAX)
• <930ps In-to-Out tpd
• <220ps tr/tf
• Ultra-low jitter design:
• <1psRMS random jitter (RJ)
• <10psPP total jitter (clock)
• Internal input termination
• Patent-pending input termination and VT pin accepts AC- and DC-coupled inputs (CML, PECL, LVDS)
• 800mV LVPECL output swing
• CMOS/TTL-compatible output enable (EN) and divider select control
• Power supply 2.5V +5% or 3.3V +10%
• -40°C to +85°C industrial temperature range
• Available in 32-pin QFN package

简介

SY89202U属于集成电路（IC）的时钟缓冲器驱动器。由制造生产的SY89202U时钟缓冲器，驱动器时钟缓冲器和驱动器集成电路产品族中的产品用于帮助信号在系统中传输，常用作频率/时间参考信号，以同步系统内的活动。尽管这些器件最常用到的功能就是缓冲（即，为使信号不受驱动负载的影响而从某个信号源复制信号），但是该产品族中的某些器件还能执行其他功能，例如选择性改变缓冲信号路径、按某个整数值分割信号频率，或进行所用电信号格式转换。