SY58051AU数据手册集成电路（IC）的门反相器-多功能可配置规格书PDF

描述 Description

The SY58051AU is an ultra-fast, low jitter universal logic gate with a guaranteed maximum data or clock throughput of 10.7Gbps or 8GHz, respectively. This AnyGate® differential logic device will produce many logic functions of two Boolean variables, such as AND, NAND, OR, NOR, DELAY, or NEGATION.The SY58051AU differential inputs include a unique internal termination design that allows access to the termination network throughout a VT pin. This feature allows the device to easily interface to different logic standards, both AC- and DC-coupled, without external resistor-bias and termination networks. The result is a clean, stub-free, low-jitter interface solution. The differential CML output is optimized for environments with internal 50Ω source termination and a 400mV output swing.The SY58051AU operates from a 2.5V or 3.3V supply and is guaranteed over the full industrial temperature range of –40°C to +85°C. The SY58051AU is part of Micrel’s Precision Edge® product family.

特性 Features

• Three matched-delay input pair provide any logic function: AND, NAND, OR, NOR
• Guaranteed AC performance over temperature and voltage:
• DC to >10.7Gbps data rate throughput
• DC to >8GHz clock fMAX
• <160ps Any In-to-Out tpd
• 20ps typical tr / tf
• Ultra low-jitter design:
• 0.2psRMS typical random jitter (data)
• 2psPP typical deterministic jitter (data)
• 5psPP typical total jitter (clock)
• 46fsRMS typical additive phase jitter (clock)
• Unique input termination and VT pin accepts AC- coupled and DC-coupled inputs (CML, PECL)
• Internal 50Ω output source termination
• Typical 400mV CML output swing (RL = 50Ω)
• Internal 50Ω input termination
• Power supply 2.5V ±5% or 3.3V ±10%
• -40°C to +85°C industrial temperature range
• Available in a 16-pin (3mm x 3mm) QFN package

简介

SY58051AU属于集成电路（IC）的门反相器-多功能可配置。由制造生产的SY58051AU门和反相器 - 多功能，可配置可配置逻辑栅极系列产品能以与标准逻辑栅极类似的方式，对单个逻辑信号执行基本逻辑运算，但并非局限于一个特定功能（例如 AND、NAND 等）。它们通常在内部使用少量逻辑门来实现，经过选择和互连后，以便通过选择操作数据所应用的输入以及任何未使用的输入在驱动后的逻辑状态，来配置所实现的整体逻辑功能。