SY10E212JCTR中文资料麦瑞半导体数据手册PDF规格书

DESCRIPTION

The SY10/100E212 are scannable registered ECL drivers typically used as fan-out memory address drivers for ECL cache driving. In a VLSI array-based CPU design, use of the E212 allows the user to conserve array output cell functionality and also output pins.

The input shift register is designed with control logic which greatly facilitates its use in boundary scan applications.

FEATURES

■ Scannable version E112 driver

■ Extended 100E VEE range of –4.2V to –5.5V

■ 1025ps max. CLK to Output

■ Dual differential outputs

■ Master Reset

■ Internal 75KΩ input pull-down resistors

■ Fully compatible with industry standard 10KH, 100K ECL levels

■ Fully compatible with Motorola MC10E/100E212

■ Available in 28-pin PLCC package