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SY100S834

(첨1, 첨2, 첨4) OR (첨2, 첨4, 첨8) CLOCK GENERATION CHIP

DESCRIPTION TheSY100S834/Lislowskew(÷1,÷2,÷4)or(÷2,÷4,÷8)clockgenerationchipdesignedexplicitlyforlowskewclockgenerationapplications.Theinternaldividersaresynchronoustoeachother,therefore,thecommonoutputedgesareallpreciselyaligned.Thedevicescanbedrivenb

MicrelMicrel Semiconductor

麦瑞半导体麦克雷尔|麦瑞半导体

SY100S834

(첨1, 첨2, 첨4) OR (첨2, 첨4, 첨8) CLOCK GENERATION CHIP

MicrelMicrel Semiconductor

麦瑞半导体麦克雷尔|麦瑞半导体

SY100S834

(첨1, 첨2, 첨4) OR (첨2, 첨4, 첨8) CLOCK GENERATION CHIP

MicrelMicrel Semiconductor

麦瑞半导体麦克雷尔|麦瑞半导体

SY100S834LZC

(첨1, 첨2, 첨4) OR (첨2, 첨4, 첨8) CLOCK GENERATION CHIP

DESCRIPTION TheSY100S834/Lislowskew(÷1,÷2,÷4)or(÷2,÷4,÷8)clockgenerationchipdesignedexplicitlyforlowskewclockgenerationapplications.Theinternaldividersaresynchronoustoeachother,therefore,thecommonoutputedgesareallpreciselyaligned.Thedevicescanbedrivenb

MicrelMicrel Semiconductor

麦瑞半导体麦克雷尔|麦瑞半导体

SY100S834LZCTR

(첨1, 첨2, 첨4) OR (첨2, 첨4, 첨8) CLOCK GENERATION CHIP

DESCRIPTION TheSY100S834/Lislowskew(÷1,÷2,÷4)or(÷2,÷4,÷8)clockgenerationchipdesignedexplicitlyforlowskewclockgenerationapplications.Theinternaldividersaresynchronoustoeachother,therefore,thecommonoutputedgesareallpreciselyaligned.Thedevicescanbedrivenb

MicrelMicrel Semiconductor

麦瑞半导体麦克雷尔|麦瑞半导体

SY100S834LZI

(첨1, 첨2, 첨4) OR (첨2, 첨4, 첨8) CLOCK GENERATION CHIP

DESCRIPTION TheSY100S834/Lislowskew(÷1,÷2,÷4)or(÷2,÷4,÷8)clockgenerationchipdesignedexplicitlyforlowskewclockgenerationapplications.Theinternaldividersaresynchronoustoeachother,therefore,thecommonoutputedgesareallpreciselyaligned.Thedevicescanbedrivenb

MicrelMicrel Semiconductor

麦瑞半导体麦克雷尔|麦瑞半导体

SY100S834LZITR

(첨1, 첨2, 첨4) OR (첨2, 첨4, 첨8) CLOCK GENERATION CHIP

DESCRIPTION TheSY100S834/Lislowskew(÷1,÷2,÷4)or(÷2,÷4,÷8)clockgenerationchipdesignedexplicitlyforlowskewclockgenerationapplications.Theinternaldividersaresynchronoustoeachother,therefore,thecommonoutputedgesareallpreciselyaligned.Thedevicescanbedrivenb

MicrelMicrel Semiconductor

麦瑞半导体麦克雷尔|麦瑞半导体

SY100S834ZC

(첨1, 첨2, 첨4) OR (첨2, 첨4, 첨8) CLOCK GENERATION CHIP

DESCRIPTION TheSY100S834/Lislowskew(÷1,÷2,÷4)or(÷2,÷4,÷8)clockgenerationchipdesignedexplicitlyforlowskewclockgenerationapplications.Theinternaldividersaresynchronoustoeachother,therefore,thecommonoutputedgesareallpreciselyaligned.Thedevicescanbedrivenb

MicrelMicrel Semiconductor

麦瑞半导体麦克雷尔|麦瑞半导体

SY100S834ZCTR

(첨1, 첨2, 첨4) OR (첨2, 첨4, 첨8) CLOCK GENERATION CHIP

DESCRIPTION TheSY100S834/Lislowskew(÷1,÷2,÷4)or(÷2,÷4,÷8)clockgenerationchipdesignedexplicitlyforlowskewclockgenerationapplications.Theinternaldividersaresynchronoustoeachother,therefore,thecommonoutputedgesareallpreciselyaligned.Thedevicescanbedrivenb

MicrelMicrel Semiconductor

麦瑞半导体麦克雷尔|麦瑞半导体

SY100S834ZI

(첨1, 첨2, 첨4) OR (첨2, 첨4, 첨8) CLOCK GENERATION CHIP

DESCRIPTION TheSY100S834/Lislowskew(÷1,÷2,÷4)or(÷2,÷4,÷8)clockgenerationchipdesignedexplicitlyforlowskewclockgenerationapplications.Theinternaldividersaresynchronoustoeachother,therefore,thecommonoutputedgesareallpreciselyaligned.Thedevicescanbedrivenb

MicrelMicrel Semiconductor

麦瑞半导体麦克雷尔|麦瑞半导体

SY100S834ZITR

(첨1, 첨2, 첨4) OR (첨2, 첨4, 첨8) CLOCK GENERATION CHIP

DESCRIPTION TheSY100S834/Lislowskew(÷1,÷2,÷4)or(÷2,÷4,÷8)clockgenerationchipdesignedexplicitlyforlowskewclockgenerationapplications.Theinternaldividersaresynchronoustoeachother,therefore,thecommonoutputedgesareallpreciselyaligned.Thedevicescanbedrivenb

MicrelMicrel Semiconductor

麦瑞半导体麦克雷尔|麦瑞半导体

SY100S834_06

(첨1, 첨2, 첨4) OR (첨2, 첨4, 첨8) CLOCK GENERATION CHIP

MicrelMicrel Semiconductor

麦瑞半导体麦克雷尔|麦瑞半导体

SY100S834_09

(첨1, 첨2, 첨4) OR (첨2, 첨4, 첨8) CLOCK GENERATION CHIP

MicrelMicrel Semiconductor

麦瑞半导体麦克雷尔|麦瑞半导体

SY100S834_11

(첨1, 첨2, 첨4) or (첨2, 첨4, 첨8) Clock Generation Chip

MicrelMicrel Semiconductor

麦瑞半导体麦克雷尔|麦瑞半导体

SY100S834L

(첨1, 첨2, 첨4) OR (첨2, 첨4, 첨8) CLOCK GENERATION CHIP

MicrelMicrel Semiconductor

麦瑞半导体麦克雷尔|麦瑞半导体

SY100S834L

(첨1, 첨2, 첨4) OR (첨2, 첨4, 첨8) CLOCK GENERATION CHIP

MicrelMicrel Semiconductor

麦瑞半导体麦克雷尔|麦瑞半导体

SY100S834LZC

(첨1, 첨2, 첨4) OR (첨2, 첨4, 첨8) CLOCK GENERATION CHIP

MicrelMicrel Semiconductor

麦瑞半导体麦克雷尔|麦瑞半导体

SY100S834LZC

(첨1, 첨2, 첨4) OR (첨2, 첨4, 첨8) CLOCK GENERATION CHIP

MicrelMicrel Semiconductor

麦瑞半导体麦克雷尔|麦瑞半导体

SY100S834LZC

(첨1, 첨2, 첨4) or (첨2, 첨4, 첨8) Clock Generation Chip

MicrelMicrel Semiconductor

麦瑞半导体麦克雷尔|麦瑞半导体

SY100S834LZCTR

(첨1, 첨2, 첨4) OR (첨2, 첨4, 첨8) CLOCK GENERATION CHIP

MicrelMicrel Semiconductor

麦瑞半导体麦克雷尔|麦瑞半导体

详细参数

  • 型号:

    SY100S834

  • 功能描述:

    IC CLOCK GEN 3.3V/5V 16-SOIC

  • RoHS:

  • 类别:

    集成电路(IC) >> 时钟/计时 - 时钟发生器,PLL,频率合成器

  • 系列:

    Precision Edge®

  • 标准包装:

    27

  • 类型:

    频率合成器

  • PLL:

  • 输入:

    PECL,晶体

  • 输出:

    PECL

  • 电路数:

    1 比率 -

  • 1:

    1 差分 -

  • 输出:

    无/是 频率 -

  • 最大:

    800MHz

  • 除法器/乘法器:

    是/无

  • 电源电压:

    3.135 V ~ 5.25 V

  • 工作温度:

    0°C ~ 85°C

  • 安装类型:

    表面贴装

  • 封装/外壳:

    28-SOIC(0.295,7.50mm 宽)

  • 供应商设备封装:

    28-SOIC

  • 包装:

    管件

供应商型号品牌批号封装库存备注价格
SYNERGY
22+
SOP16
3000
强调现货,随时查询!
询价
MICREL
O629
SOP-16P
100
询价
Micrel
23+
16-SOIC
7750
全新原装优势
询价
MICREL
24+
SOP16P
6868
原装现货,可开13%税票
询价
MICREL
23+
SOP-16
8500
原装正品,现货销售
询价
SYNERGY
22+
SMD
7500
十年品牌!原装现货!!!
询价
MICREL
24+
SOP-16
5000
只做原装公司现货
询价
Microchip
23+
2017-MI
21500
受权代理!全新原装现货特价热卖!
询价
MicrelInc
22+23+
16-SOIC
12847
绝对原装正品全新进口深圳现货
询价
SYNERGY
24+
PLCC
90000
一级代理商进口原装现货、假一罚十价格合理
询价
更多SY100S834供应商 更新时间2024-6-20 11:02:00