SY100S364中文资料Multiplexers Products数据手册Microchip规格书

描述 Description

The SY100S364 is a 16-input multiplexer designed for use in high-performance ECL systems. The four Data Select inputs (S0, S1, S2, S3) determine the bit from the 16 inputs (In) that will be passed on to the output as shown in the Truth Table. The output data polarity is the same as the input. The inputs on the device have 75K pull-down resistors.

特性 Features

·Max. propagation delay of 1300ps
·IEE min. of -63mA
·Industry standard 100K ECL levels
·Extended supply voltage option:
·VEE= -4.2V to -5.5V
·Voltage and temperature compensation for improved noise immunity
·Internal 75K input pull-down resistors
·70% faster than National or Signetics
·40% lower power than National or Signetics
·Function and pinout compatible with National and Signetics F100K
·Available in 28-pin PLCC package

简介

SY100S364属于集成电路（IC）的信号开关多路复用器解码器。由制造生产的SY100S364信号开关，多路复用器，解码器逻辑型信号开关、多路复用器和编码器 IC 可用于对以数字格式表示数据的电信号进行路由和选择。这些器件与设计用于模拟信号的类似产品有所不同，它们保留的信息表示为两个电状态之一，而不是两个外部界限内的无穷变化量。