ENHANCED 4-STAGE COUNTER/SHIFT REGISTER

DESCRIPTION The SY100S336A is functionally the same as the SY100S336, but has Sn to TC speed and Sn set-up and hold times significantly improved, allowing for higher clock frequency when used as a cascaded multi-stage counter. FEATURES ■ Max. shift frequency of 700MHz ■ Clock to Q delay max. o

文件：149.89 Kbytes 页数：9 Pages

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ENHANCED 4-STAGE COUNTER/SHIFT REGISTER

文件：126.53 Kbytes 页数：10 Pages

Micrel

麦瑞半导体

ENHANCED 4-STAGE COUNTER/SHIFT REGISTER

文件：126.53 Kbytes 页数：10 Pages

Micrel

麦瑞半导体

ENHANCED 4-STAGE COUNTER/SHIFT REGISTER

文件：126.53 Kbytes 页数：10 Pages

Micrel

麦瑞半导体

4-STAGE COUNTER/ SHIFT REGISTER

DESCRIPTION The SY100S336 functions either as a modulo-16 up/down counter or as a 4-bit bidirectional shift register and is designed for use in high-performance ECL systems. Three Select inputs (Sn) are provided for determining the mode of operation. The Function Table lists the available modes o

文件：149.34 Kbytes 页数：9 Pages

Micrel

麦瑞半导体