SY100S318JCTR中文资料麦瑞半导体数据手册PDF规格书

DESCRIPTION

The SY100S318 is an ultra-fast 5-wide 5, 4, 4, 4, 2 OR/AND gate with both true and complementary outputs, designed for use in high-performance ECL systems. The inputs on this device have 75KΩ pull-down resistors.

FEATURES

■ Max. propagation delay of 800ps

■ IEE min. of –55mA

■ Extended supply voltage option: VEE = –4.2V to –5.5V

■ Voltage and temperature compensation for improved noise immunity

■ Internal 75KΩ input pull-down resistors

■ 70 faster than Fairchild

■ 40 lower power than Fairchild

■ Function and pinout compatible with Fairchild F100K

■ Available in 24-pin CERPACK and 28-pin PLCC packages