SY100EP111U中文资料Translators Products数据手册Microchip规格书

描述 Description

The SY100EP111U is a high-speed, low skew 1-to-10 differential fanout buffer designed for clock distribution in new, high-performance systems. The internal 2:1 mux allows the input to select between two differential clock sources.The device is specifically designed for low skew. The interconnect scheme and metal layout are carefully optimized for minimal gate-to-gate skew within the device. Wafer characterization and process control ensure consistent distribution of propagation delay from lot to lot.The VBB output is intended for use as a reference voltage for single-ended reception of ECL signals to that device only. When using VBB for this purpose, it is recommended that VBB is decoupled to VCC via a 0.01µF capacitor.

特性 Features

·2.5V and 3.3V power supply options
·Guaranteed AC parameters over temperature:·fMAX = 3GHz
·<25ps output-to-output skew
·<250ps tr/tf
·<400ps propagation delay

·Wide temperature range: –40°C to +85°C
·VBB output for single-ended operation
·Differential design
·Fully compatible with industry standard 100K I/O levels
·Available in 32-Pin TQFP package

简介

SY100EP111U属于集成电路（IC）的时钟缓冲器驱动器。由制造生产的SY100EP111U时钟缓冲器，驱动器时钟缓冲器和驱动器集成电路产品族中的产品用于帮助信号在系统中传输，常用作频率/时间参考信号，以同步系统内的活动。尽管这些器件最常用到的功能就是缓冲（即，为使信号不受驱动负载的影响而从某个信号源复制信号），但是该产品族中的某些器件还能执行其他功能，例如选择性改变缓冲信号路径、按某个整数值分割信号频率，或进行所用电信号格式转换。