Dual Differential PECL-to-TTL Translator

General Description The SY100ELT23 is a dual differential PECL-to-TTL translator. Because PECL (positive ECL) levels are used, only +5V and ground are required. The small outline 8-lead SOIC package and low skew, dual gate design make the ELT23 ideal for applications that require the transla

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Microchip

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DUAL DIFFERENTIAL PECL-to-TTL TRANSLATOR

文件：56.45 Kbytes 页数：5 Pages

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DUAL DIFFERENTIAL PECL-to-TTL TRANSLATOR

文件：61.14 Kbytes 页数：4 Pages

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Translators

The SY100ELT23 are dual differential PECL-to-TTL translators. Because PECL (Positive ECL) levels are used, only +5V and ground are required. The small outline 8-lead SOIC package and the low skew, dual gate design of the ELT23 makes it ideal for applications which require the tranlation of a clock a • 3.0 ns typical propagation delay\n• <500ps output-to-output skew\n• Differential PECL inputs\n• 24mA TTL outputs\n• Flow-through pinouts\n• Internal 50kOhm pulldown resistors\n• Available in 8-pin SOIC package;

Microchip

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3.3V DUAL DIFFERENTIAL LVPECL-to-LVTTL TRANSLATOR

DESCRIPTION The SY10/100ELT23L are dual differential LVPECL to-LVTTL translators with +3.3V power supply. Because LVPECL (Low Voltage Positive ECL) levels are used, only +3.3V and ground are required. The small outline 8- pin SOIC package and the low skew, dual gate design of the ELT23L make

文件：51.1 Kbytes 页数：4 Pages

Micrel

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3.3V DUAL DIFFERENTIAL LVPECL-to-LVTTL TRANSLATOR

DESCRIPTION The SY10/100ELT23L are dual differential LVPECL to-LVTTL translators with +3.3V power supply. Because LVPECL (Low Voltage Positive ECL) levels are used, only +3.3V and ground are required. The small outline 8- pin SOIC package and the low skew, dual gate design of the ELT23L make

文件：51.1 Kbytes 页数：4 Pages

Micrel

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DUAL DIFFERENTIAL PECL-to-TTL TRANSLATOR

DESCRIPTION The SY10/100ELT23 are dual differential PECL-to-TTL translators. Because PECL (Positive ECL) levels are used, only +5V and ground are required. The small outline 8-lead SOIC package and the low skew dual gate design of the ELT23 makes it ideal for applications which require the transl

文件：51.76 Kbytes 页数：4 Pages

Micrel

麦瑞半导体

DUAL DIFFERENTIAL PECL-to-TTL TRANSLATOR

DESCRIPTION The SY10/100ELT23 are dual differential PECL-to-TTL translators. Because PECL (Positive ECL) levels are used, only +5V and ground are required. The small outline 8-lead SOIC package and the low skew dual gate design of the ELT23 makes it ideal for applications which require the transl

文件：51.76 Kbytes 页数：4 Pages

Micrel

麦瑞半导体

Dual Differential PECL-to-TTL Translator

General Description The SY100ELT23 is a dual differential PECL-to-TTL translator. Because PECL (positive ECL) levels are used, only +5V and ground are required. The small outline 8-lead SOIC package and low skew, dual gate design make the ELT23 ideal for applications that require the transla

文件：1.09415 Mbytes 页数：12 Pages

Microchip

微芯科技

Dual Differential PECL-to-TTL Translator

General Description The SY100ELT23 is a dual differential PECL-to-TTL translator. Because PECL (positive ECL) levels are used, only +5V and ground are required. The small outline 8-lead SOIC package and low skew, dual gate design make the ELT23 ideal for applications that require the transla

文件：1.09415 Mbytes 页数：12 Pages

Microchip

微芯科技