5V/3.3V 첨 4 DIVIDER

文件：473.5 Kbytes 页数：4 Pages

Micrel

麦瑞半导体

5V/3.3V 첨 4 DIVIDER

DESCRIPTION The SY10/100EL33/L are integrated ÷4 dividers. The differential clock inputs and the VBB allow a differential, single-ended or AC-coupled interface to the device. If used, the VBB output should be bypassed to ground with a 0.01µF capacitor. Also note that the VBB is designed to be u

文件：59.04 Kbytes 页数：4 Pages

Micrel

麦瑞半导体

5V/3.3V 첨 4 DIVIDER

DESCRIPTION The SY10/100EL33/L are integrated ÷4 dividers. The differential clock inputs and the VBB allow a differential, single-ended or AC-coupled interface to the device. If used, the VBB output should be bypassed to ground with a 0.01µF capacitor. Also note that the VBB is designed to be u

文件：59.04 Kbytes 页数：4 Pages

Micrel

麦瑞半导体

5V/3.3V 첨 4 DIVIDER

文件：473.5 Kbytes 页数：4 Pages

Micrel

麦瑞半导体

5V/3.3V 첨 4 DIVIDER

文件：473.5 Kbytes 页数：4 Pages

Micrel

麦瑞半导体

5V/3.3V 첨 4 DIVIDER

文件：473.5 Kbytes 页数：4 Pages

Micrel

麦瑞半导体

5V/3.3V 첨 4 DIVIDER

文件：473.5 Kbytes 页数：4 Pages

Micrel

麦瑞半导体

5V/3.3V 첨 4 DIVIDER

文件：473.5 Kbytes 页数：4 Pages

Micrel

麦瑞半导体

5V/3.3V 첨 4 DIVIDER

文件：473.5 Kbytes 页数：4 Pages

Micrel

麦瑞半导体

3.3V ECL ÷ 4 Divider

The SY100EL33L are integrated ÷4 dividers. The differential clock inputs and the VBB allow a differential, single-ended or AC-coupled interface to the device. If used, the VBB output should be bypassed to ground with a 0.01µF capacitor. Also note that the VBB is designed to be used as an input bias

Microchip

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