5-BIT DIFFERENTIAL REGISTER

DESCRIPTION The SY10/100E452 are 5-bit differential registers with differential data (inputs and outputs) and clock. The registers are triggered by a positive transition of the positive clock (CLK) input. A high on the Master Reset (MR) asynchronously resets all registers so that the Q outputs go

文件：63.08 Kbytes 页数：4 Pages

Micrel

麦瑞半导体

5-BIT DIFFERENTIAL REGISTER

DESCRIPTION The SY10/100E452 are 5-bit differential registers with differential data (inputs and outputs) and clock. The registers are triggered by a positive transition of the positive clock (CLK) input. A high on the Master Reset (MR) asynchronously resets all registers so that the Q outputs go

文件：63.08 Kbytes 页数：4 Pages

Micrel

麦瑞半导体

5-BIT DIFFERENTIAL REGISTER

DESCRIPTION The SY10/100E452 are 5-bit differential registers with differential data (inputs and outputs) and clock. The registers are triggered by a positive transition of the positive clock (CLK) input. A high on the Master Reset (MR) asynchronously resets all registers so that the Q outputs go

文件：63.08 Kbytes 页数：4 Pages

Micrel

麦瑞半导体

5-BIT DIFFERENTIAL REGISTER

Description The MC10E/100E452 is a 5-bit differential register with differential data (inputs and outputs) and clock. The registers are triggered by a positive transition of the positive clock (CLK) input. A high on the Master Reset (MR) asynchronously resets all registers so that the Q outputs g

文件：111.62 Kbytes 页数：4 Pages

ONSEMI

安森美半导体

5V ECL 5-Bit Differential Register

文件：135.59 Kbytes 页数：8 Pages

ONSEMI

安森美半导体

5V ECL 5-Bit Differential Register

文件：135.59 Kbytes 页数：8 Pages

ONSEMI

安森美半导体