SY100E451JCTR中文资料麦瑞半导体数据手册PDF规格书

DESCRIPTION

The SY10/100E451 offer six D-type flip-flops with single-ended outputs and differential data and clock inputs, designed for use in new, high-performance ECL systems. The registers are triggered by the rising edge of the CLK input.

FEATURES

■ 1100MHz min. toggle frequency

■ Extended 100E VEE range of –4.2V to –5.5V

■ Differential inputs: data and clock

■ VBB output for single-ended use

■ Asynchronous Master Reset

■ Fully compatible with industry standard 10KH, 100K ECL levels

■ Internal 75KΩ input pulldown resistors

■ Fully compatible with Motorola MC10E/100E451

■ Available in 28-pin PLCC package