SY100E112JCTR中文资料麦瑞半导体数据手册PDF规格书

DESCRIPTION

The SY10/100E112 are quad drivers designed for use in new, high-performance ECL systems. The E112 has two pairs of OR/NOR outputs from each gate and a common, buffered enable input. The data input can also be used as an ECL memory address fan-out driver, although the E111 is designed specifically for this purpose, and offers lower skew than the E112. For memory address driver applications where scan capabilities are required, please refer to the SY10/100E212 device.

FEATURES

■ 600ps max. propagation delay

■ Extended 100E VEE range of –4.2V to –5.5V

■ Common enable input

■ Fully compatible with industry standard 10KH, 100K

I/O levels

■ Internal 75KΩ input pulldown resistors

■ Fully compatible with Motorola MC10E/100E112

■ Available in 28-pin PLCC package