High-density performance line Arm®-based 32-bit MCU with 256 to 512KB Flash, USB, CAN, 11 timers, 3 ADCs, 13 communication interfaces

Features • Core: Arm 32-bit Cortex -M3 CPU – 72 MHz maximum frequency, 1.25 DMIPS/MHz (Dhrystone 2.1) performance at 0 wait state memory access – Single-cycle multiplication and hardware division • Memories – 256 to 512 Kbytes of Flash memory – up to 64 Kbytes of SRAM – Flexible static m

文件：3.21166 Mbytes 页数：143 Pages

STMICROELECTRONICS

意法半导体

High-density performance line Arm®-based 32-bit MCU with 256 to 512KB Flash, USB, CAN, 11 timers, 3 ADCs, 13 communication interfaces

Features • Core: Arm 32-bit Cortex -M3 CPU – 72 MHz maximum frequency, 1.25 DMIPS/MHz (Dhrystone 2.1) performance at 0 wait state memory access – Single-cycle multiplication and hardware division • Memories – 256 to 512 Kbytes of Flash memory – up to 64 Kbytes of SRAM – Flexible static m

文件：3.21166 Mbytes 页数：143 Pages

STMICROELECTRONICS

意法半导体

High-density performance line Arm®-based 32-bit MCU with 256 to 512KB Flash, USB, CAN, 11 timers, 3 ADCs, 13 communication interfaces

Features • Core: Arm 32-bit Cortex -M3 CPU – 72 MHz maximum frequency, 1.25 DMIPS/MHz (Dhrystone 2.1) performance at 0 wait state memory access – Single-cycle multiplication and hardware division • Memories – 256 to 512 Kbytes of Flash memory – up to 64 Kbytes of SRAM – Flexible static m

文件：3.21166 Mbytes 页数：143 Pages

STMICROELECTRONICS

意法半导体

High-density performance line Arm®-based 32-bit MCU with 256 to 512KB Flash, USB, CAN, 11 timers, 3 ADCs, 13 communication interfaces

Features • Core: Arm 32-bit Cortex -M3 CPU – 72 MHz maximum frequency, 1.25 DMIPS/MHz (Dhrystone 2.1) performance at 0 wait state memory access – Single-cycle multiplication and hardware division • Memories – 256 to 512 Kbytes of Flash memory – up to 64 Kbytes of SRAM – Flexible static m

文件：3.21166 Mbytes 页数：143 Pages

STMICROELECTRONICS

意法半导体

High-density performance line Arm®-based 32-bit MCU with 256 to 512KB Flash, USB, CAN, 11 timers, 3 ADCs, 13 communication interfaces

Features • Core: Arm 32-bit Cortex -M3 CPU – 72 MHz maximum frequency, 1.25 DMIPS/MHz (Dhrystone 2.1) performance at 0 wait state memory access – Single-cycle multiplication and hardware division • Memories – 256 to 512 Kbytes of Flash memory – up to 64 Kbytes of SRAM – Flexible static m

文件：3.21166 Mbytes 页数：143 Pages

STMICROELECTRONICS

意法半导体

High-density performance line ARM-based 32-bit MCU with 256 to 512KB Flash, USB, CAN, 11 timers, 3 ADCs, 13 communication interfaces

文件：1.70293 Mbytes 页数：123 Pages

STMICROELECTRONICS

意法半导体

High-density performance line ARM-based 32-bit MCU with 256 to 512KB Flash, USB, CAN, 11 timers, 3 ADCs, 13 communication interfaces

文件：1.70293 Mbytes 页数：123 Pages

STMICROELECTRONICS

意法半导体

High-density performance line ARM-based 32-bit MCU with 256 to 512KB Flash, USB, CAN, 11 timers, 3 ADCs, 13 communication interfaces

文件：1.70293 Mbytes 页数：123 Pages

STMICROELECTRONICS

意法半导体

High-density performance line ARM-based 32-bit MCU with 256 to 512KB Flash, USB, CAN, 11 timers, 3 ADCs, 13 communication interfaces

文件：1.70293 Mbytes 页数：123 Pages

STMICROELECTRONICS

意法半导体