STLVDS32BDR集成电路（IC）的驱动器接收器收发器规格书PDF中文资料

STLVDS32BDR属于集成电路（IC）的驱动器接收器收发器。由意法半导体集团制造生产的STLVDS32BDR驱动器，接收器，收发器该系列产品的主要功能是提供必需的硬件资源，以通过延长电缆或印制线进行通信。确切的功能会因所采用的通信协议而异，可能包括诸如瞬态抑制之类的功能，这些功能对于通信用途可能并非绝对必要，但对于可能的使用环境却是明智之选。

DESCRIPTION

The STLVDS32 is a differential line receiver that implements the electrical characteristics of low voltage differential signaling (LVDS). This signaling technique lowers the output voltage levels of 5V differential standard levels (such as TIA/EIA-422B) to reduce the power, increase the switching speeds and allow operations with a 3.3V supply rail. This differential receiver provides a valid logical output state with a 3.3V supply rail. It also provides a valid logical output state with a ±100mV differential input voltage within the input common mode voltage range. The input common mode voltage allows 1V of ground potential difference between two LVDS nodes.

The intended application of this device and signalling technique is both point-to-point and multidrop data transmission over controlled impedance media approximately 100Ω. The transmission media may be printed circuit board traces, backplanes or cables. The ultimate rate and distance of data transfer depend upon the attenuation characteristics of the media and noise coupling to the environment.

The STLVDS32 version is characterized for operation from -40°C to 85°C.

■ MEETS OR EXCEEDS THE

REQUIREMENTS OF ANSI TIA/EIA-644

STANDARD

■ OPERATES WITH A SINGLE 3.3V SUPPLY

■ DESIGNED FOR SIGNALING RATE UP TO

400Mbps

■ DIFFERENTIAL INPUT THRESHOLDS

±100mV MAX

■ TYPICAL PROPAGATION DELAY TIME OF

2.5ns

■ POWER DISSIPATION 60mW TYPICAL PER

RECEIVER AT 200MHz

■ LOW VOLATGE TTL (LVTTL) LOGIC

OUTPUT LEVELS

■ PIN COMPATIBLE WITH THE AM26LS32,

SN65LVD32

■ OPEN CIRCUIT FAIL SAFE

■ ESD PROTECTION:

7KV RECEIVER PINS

3KV ALL PINS VS GND