STiH252数据手册ST中文资料规格书

描述 Description

The STiH252 uses the latest process technology to provide a cost-effective, feature rich, highly integrated SoC for set-top boxes (STBs). It is targeted at the advanced decoding STB market across cable, terrestrial and IP/hybrid networks, and is suitable for retail markets worldwide.

特性 Features

Integrated DVB-C, DVB-T and DVB-T2 demodulator and FEC
ST40 applications CPU with 256 Kbyte L2 cache650 MHz delivering 1200 DMIPs

16-bit LMI supporting DDR3:Up to 667 MHz (DDR3-1333)

Latest generation Delta decoder with ST231 core:Decoding of H.264, MPEG2, VC-1 and AVS HD or SD video streams

3DTV decoding and display, compatible with HDMI 1.4b
Extensive connectivity:Two USB 2.0 ports
Ethernet MII/RMII/TMII port
SD/eMMC card port
Gen II (3 Gbit/s) eSATA port
PCI-e port

Secure boot from SLC NAND Flash or Serial NOR Flash
Low-power process and architecture
Integrated low power standby controller
High-quality video resizing and de-interlacing
Targets two-layer PCBs for cost-effective zapper and STB applications
Integrated 10/100 Ethernet MAC and PHY
2D graphics blitter
Package: PBGA 27 x 27 mm2