STA013集成电路（IC）的编码器解码器转换器规格书PDF中文资料

STA013属于集成电路（IC）的编码器解码器转换器。由意法半导体集团制造生产的STA013编码器，解码器，转换器该系列产品可用于将信息封装或编码为适合于传输或存储的格式，和/或在通信路径的另一端执行逆运算，通常是通过使用某些形式的调制过程。示例包括从数字数据生成模拟视频信号的器件（反之亦然）；基于传输目的对按钮的状态进行编码的器件（实现远程控制功能）；以及便于将标准 UART 连接到标准红外收发器的器件。

DESCRIPTION

The STA013 is a fully integrated high flexibility MPEG Layer III Audio Decoder, capable of decoding Layer III compressed elementary streams, as specified in MPEG 1 and MPEG 2 ISO standards. The device decodes also elementary streams compressed by using low sampling rates, as specified by MPEG 2.5.

■ SINGLE CHIP MPEG2 LAYER 3 DECODER

SUPPORTING:

- All features specified for Layer III in ISO/IEC

11172-3 (MPEG 1 Audio)

- All features specified for Layer III in ISO/IEC

13818-3.2 (MPEG 2 Audio)

- Lower sampling frequencies syntax extension,

(not specified by ISO) called MPEG 2.5

■ DECODES LAYER III STEREO CHANNELS,

DUAL CHANNEL, SINGLE CHANNEL

(MONO)

■ SUPPORTING ALL THE MPEG 1 & 2 SAMPLING

FREQUENCIES AND THE EXTENSION TO MPEG 2.5:

48, 44.1, 32, 24, 22.05, 16, 12, 11. 025, 8 KHz

■ ACCEPTS MPEG 2.5 LAYER III ELEMENTARY COMPRESSED BITSTREAM WITH

DATA RATE FROM 8 Kbit/s UP TO 320 Kbit/s

■ DIGITAL VOLUME CONTROL

■ DIGITAL BASS & TREBLE CONTROL

■ SERIAL BITSTREAM INPUT INTERFACE

■ ANCILLARY DATA EXTRACTION VIA I2C INTERFACE.

■ SERIAL PCM OUTPUT INTERFACE (I2S

AND OTHER FORMATS)

PLL FOR INTERNAL CLOCK AND FOR OUTPUT PCM CLOCK GENERATION

■ LOW POWER CONSUMPTION:

85mW AT 2.4V

■ CRC CHECK AND SYNCHRONISATION ERROR DETECTION

WITH SOFTWARE INDICATORS

■ I2C CONTROL BUS

■ LOW POWER 3.3V CMOS TECHNOLOGY

■ 10 MHz, 14.31818 MHz, OR 14.7456 MHz

EXTERNAL INPUT CLOCK OR BUILT-IN INDUSTRY STANDARD

XTAL OSCILLATOR DIFFERENT FREQUENCIES MAY BE

SUPPORTED UPON REQUEST TO STM

APPLICATIONS

■ PC SOUND CARDS

■ MULTIMEDIA PLAYERS