ST72P561J6中文资料意法半导体数据手册PDF规格书

INTRODUCTION

The ST72561/ST72563 devices are members of the ST7 microcontroller family designed for midrange applications with CAN (Controller Area Network) and LIN (Local Interconnect Network) interface.

■ Memories

– 32K to 60K High Density Flash (HDFlash) or ROM with read-out protection capability. InApplication Programming and In-Circuit Programming for HDFlash devices

– 1 to 2K RAM

– HDFlash endurance: 100 cycles, data retention: 20 years at 55°C

■ Clock, Reset and Supply Management

– Low power crystal/ceramic resonator oscillators and bypass for external clock

– PLL for 2x frequency multiplication

– Five Power Saving Modes: Halt, Auto Wake Up From Halt, Active-Halt, Wait and Slow

■ Interrupt Management

– Nested interrupt controller

– 14 interrupt vectors plus TRAP and RESET

– TLI top level interrupt (on 64-pin devices)

– Up to 21 external interrupt lines (on 4 vectors)

■ Up to 48 I/O Ports

– Up to 48 multifunctional bidirectional I/O lines

– Up to 36 alternate function lines

– Up to 6 high sink outputs

■ 5 Timers

– 16-bit Timer with: 2 input captures, 2 output compares, external clock input, PWM and pulse generator modes

– 8-bit Timer with: 1 or 2 input captures, 1 or 2 output compares, PWM and pulse generator modes

– 8-bit PWM Auto-Reload Timer with: 1 or 2 input captures, 2 or 4 independent PWM output channels, output compare and time base interrupt, external clock with event detector

– Main Clock Controller with: Real time base and Clock output

– Window watchdog timer

■ Up to 4 Communications Interfaces

– SPI synchronous serial interface

– Master/slave LINSCI™ asynchronous serial interface

– Master-only LINSCI™ asynchronous serial interface

– CAN 2.0B active

■ Analog peripheral (low current coupling)

– 10-bit A/D Converter with up to 16 inputs

– Up to 9 robust ports (low current coupling)

■ Instruction Set

– 8-bit data manipulation

– 63 basic instructions

– 17 main addressing modes

– 8 x 8 unsigned multiply instruction

■ Development Tools

– Full hardware/software development package