ST33F512数据手册ST中文资料规格书

描述 Description

The ST33F1M is a serial access microcontroller designed for secure mobile applications that incorporates the most recent generation of ARM® processors for embedded secure systems. Its SecurCore® SC300™ 32-bit RISC core is built on the Cortex™ M3 core with additional security features to help to protect against advanced forms of attacks.
Cadenced at 22.5 MHz, the SC300™ core brings great performance and excellent code density thanks to the Thumb®-2 instruction set.
The high-speed embedded Flash with up to 1280 Kbytes of memory introduces more flexibility to the system.
The ST33F1M also offers a serial communication interface fully compatible with the ISO/IEC 7816-3 standard (T=0, T=1) and a single-wire protocol (SWP) interface for communication with a near field communication (NFC) router in SIM/NFC applications.
An SPI Slave interface is also available for communication in non-SIM applications. Note that this interface is not available when ISO/IEC 7816 communications are required.
Three general purpose 16-bit timers are available; one configurable as a watchdog.
The ST33F1M features hardware accelerators for advanced cryptographic functions. The EDES peripheral provides a secure DES (Data Encryption Standard) algorithm implementation, while the NESCRYPT crypto-processor efficiently supports the public key algorithm.
The ST33F family operates in the –25 to +85°C temperature range and 1.8V, 3V and 5V supply voltage ranges. A comprehensive range of power-saving modes enables the design of efficient low-power applications.
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.

特性 Features

ST33F1M major applications include:
Mobile communications (GSM, 3G and CDMA)
Java Card™ applications
NFC applications (Banking, Transportation, etc.)
Optional MIFARE Classic & DESFire® EV1
Secure Element (UICC or embedded)
Hardware featuresARM® SecurCore® SC300™ 32-bit RISC core
Up to 30 Kbytes of User RAM
Up to 1280 Kbytes of User Flash memory with OTP area
Asynchronous receiver transmitter supporting ISO/IEC 7816-3 T=0 and T=1 protocols (Slave mode supported)
Single Wire Protocol (SWP) Interface for communications with NFC router
Serial peripheral interface (SPI) slave interface
Three 16-bit timers with interrupt capability including one 16-bit timer with watchdog capability
1.8 V, 3 V and 5 V supply voltage ranges
External clock frequency from 1 up to 10 MHz
Current consumption compatible with GSM and ETSI specifications
High performance provided by:CPU clock frequency up to 22.5 MHz
External clock multiplier (2x, 3x, and 4x)

Power-saving standby state
Contact assignment compatible with ISO/IEC 7816-2
ESD protection greater than 4 kV (HBM)

Software featuresSecure Flash Loader
Flash drivers

Security featuresActive shield
Memory protection unit (MPU)
Monitoring of environmental parameters
Protection against faults
ISO 3309 CRC calculation block
True random number generator
Unique serial number on each die
Hardware security-enhanced DES accelerator
NESCRYPT coprocessor for public key cryptography algorithms (RSA, ECC, etc.)
Code/data signature

Development environmentSoftware development and firmware generation are supported by a comprehensive set of development tools dedicated to software design and validation: C compiler, simulator and emulator.