ST32F512M数据手册ST中文资料规格书

特性 Features

• Hardware features
•Arm® Cortex®-M3 32-bit RISC core
•12 Kbytes of user RAM
•512 Kbytes of user Flash memory with a one-time programmable (OTP) area
• 10-year data retention at 105 °C, or 15 years at 85 °C
• 500 000 Erase/Write cycles per page
• 50 million Erase/Write cycles per 64 Kbyte sector
• Page granularity of 128 bytes
• Block granularity: 1 Kbyte
• 128 bytes of user OTP area
• Page Erase time 4 ms
• Block Erase (1 Kbyte) in 20 ms
• Programming performance up to 10 μs/byte
• Flash memory Erase/Write protection software programmable on 64-Kbyte sectors

•Asynchronous receiver transmitter supporting ISO 7816-3 T=0 and T=1 protocols
•Two 16-bit timers with interrupt capability
•1.8 V, 3 V and 5 V supply voltage ranges
•External clock frequency from 1 MHz up to 7.5 MHz
•High performance provided by:
• CPU clock frequency up to 15 MHz
• External clock multiplier (2x, 3x, and 4x)

•Current consumption compatible with the GSM (global system for mobile communications) and ETSI (European telecommunications standards institute) specifications
•Power-saving Standby state
•Contact assignment compatible with ISO 7816-2
•Electrostatic disturbance (ESD) protection greater than 4 kV (human body model)
•8-pin DFN (5 × 6 mm) ECOPACK package
• Security features
•Monitoring of environmental parameters
•Protection against faults
•ISO 3309 cyclic redundancy check (CRC) calculation block
•True random number generator
•Unique serial number on each die
•Hardware data encryption standard (DES) accelerator
• Software features
•Flash memory loader
•Flash memory drivers
• Development environment
•Software development and firmware generation are supported by a comprehensive set of development tools dedicated to software design and validation:
• C compiler
• Simulator
• Emulator