SPC5668EF1AVMGR中文资料恩XP数据手册PDF规格书

MPC5668x features:

• 32-bit CPU core complex (e200z650)

– Compliant with Power Architecture embedded category

– 32 KB unified cache with line locking and eight-entry

store buffer16

– Execution speed static to 116 MHz

• 32-bit I/O processor (e200z0)

– Execution speed static to 1/2 CPU core speed (58 MHz)

• 2 MB on-chip flash

– Supports read during program and erase operations, and

multiple blocks allowing EEPROM emulation

• 512 KB + 80 KB (592 KB) on-chip ECC SRAM

(MPC5668G)

• 128 KB on-chip ECC SRAM (MPC5668E)

• 16-entry Memory Protection Unit (MPC5668E only)

• Direct memory access controller

– 16-channel on MPC5668G

– 32-channel on MPC5668E

• Fast ethernet controller

– Supports 10-Mbps and 100-Mbps IEEE 802.3 MII,

10-Mbps 7-wire interface

– IEEE 802.3 MAC (compliant with IEEE 802.3 1998

edition)

• Media Local Bus (MLB) interface (MPC5668G only)

– Supports 16 logical channels, max speed 1024 Fs

• Interrupt controller (INTC) supports 316 external interrupt

vectors (22 are reserved)

• System clocks

– Frequency-modulated phase-locked loop (FMPLL)

– 4 – 40 MHz crystal oscillator (XTAL)

– 32 kHz crystal oscillator (XTAL)

– Dedicated 16 MHz and 128 kHz internal RC oscillators

• Analog to Digital Converter (ADC) module

– 10-bit A/D resolution

– 32 external channels

– 36 internal channels (MPC5668G)

– 64 internal channels (MPC5668E)

• Cross-Triggering Unit (MPC5668E only)

– Internal conversion triggering for ADC

– Triggerable by internal timers or eMIOS200

• Deserial Serial Peripheral Interface (DSPI)

– Four individual DSPI modules

– Full duplex, synchronous transfers

– Master or slave operation

• Inter-IC communication (I2C) interface

– Four individual I2C modules

– Multi-master operation

• Serial Communication Interface (eSCI) module

– Two-channel DMA interface

– Configurable as LIN bus master

• eMIOS200 timed input/output

– 24 channels, 16-bit timers (MPC5668G)

– 32 channels, 16-bit timers (MPC5668E)

• Controller Area Network (FlexCAN) module

– Compliant with CAN protocol specification, Version

2.0B active

– 64 mailboxes, each configurable as transmit or receive

• Dual-channel FlexRay controller

– Full implementation of FlexRay Protocol Specification

2.1, RevA

– 128 message buffers

• JTAG controller (MPC5668G only)

– Compliant with the IEEE 1149.1-2001

• Nexus Development Interface (NDI)

– Available in 256 MAPBGA package only

– Compliant with IEEE-ISTO 5001-2003

– Nexus class 3 development support on e200z650

– Nexus class 2+ development support on e200z0

• Internal voltage regulator allows operation from single 3.3 V or 5 V supply