SNJ54LVTH241J中文资料德州仪器数据手册PDF规格书

Support Mixed-Mode Signal Operation (5-V

Input and Output Voltages With 3.3-V VCC)

Support Unregulated Battery Operation

Down to 2.7 V

Typical VOLP (Output Ground Bounce)

<0.8 V at VCC = 3.3 V, TA = 25°C

Ioff and Power-Up 3-State Support Hot

Insertion

Bus Hold on Data Inputs Eliminates the

Need for External Pullup/Pulldown

Resistors

Latch-Up Performance Exceeds 500 mA Per

JESD 17

ESD Protection Exceeds JESD 22

− 2000-V Human-Body Model (A114-A)

− 200-V Machine Model (A115-A)

description/ordering information

These octal buffers/drivers are designed

specifically for low-voltage (3.3-V) VCC operation,

with the capability to provide a TTL interface to a

5-V system environment.

The ’LVTH241 devices are organized as two 4-bit

line drivers with separate output-enable (1OE,

2OE) inputs. When 1OE is low or 2OE is high, the

devices pass noninverted data from the A inputs

to the Y outputs. When 1OE is high or 2OE is low,

the outputs are in the high-impedance state.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors

with the bus-hold circuitry is not recommended.