SNJ54LS669J.A中文资料德州仪器数据手册PDF规格书

Programmable Look-Ahead Up/Down

Binary/Decade Counters

* Fully Synchronous Operation for Counting

and Programming

* Internal Look-Ahead for Fast Counting

© Carry Output for n-Bit Cascading

* Fully Independent Clock Circuit

© Buffered Outputs

description

Thess synchronous presetiable counters feature an in-

ternal carry look-ahead for cascading in high-speed

counting applications. The 'LS668 are decade counters

and the 'LS669 are 4-bit binary counters. Synchronous

operation is provided by having al fip-flops clocked

simultaneously so that the outputs change coincident

with each other when so instructed by the count-enable

inputs and internal ating. This mode of operation helps

eliminate the output counting spikes that are normally

associated with asynchronous (ripple-ciock) counters.

A buffered clock input triggers the four master-slave

fiip-fiops on the rising (positive-going) edge of the clock

waveform.

‘These counters are fully programmable; thats, the outputs may each be presat 1 either level. The load input circuitry allows

loading with the cary-snsble out of cascaded counters. As acing is synchronous, Seng up a ow evel a th oad input

sates the counter and causes th outputs oes withthe data inputs sf he nxt loc pulse.

Th cary ook circuitry provides fo cascading counts for it synchronous applications without addiionel geting. |

Instrumental in accomplishing hi function re two count-enabe inputs anda cary output. Both count enable input (P and

7) must be low 0 count. The diecion of th count i determine by th evel of the up/down nut. Wien he input fs ih,

the counter counts up; when low, i counts down. Input T i fd forward to enabl thf cary output. The carry output thus

enabld wi produce a ow-evel output pulse when the count i maximum counting up or zo counting down. This owlovel

veiw cay pulse can be used o oni successive cscaded sages. Transitions at th enable or T inputs ar allowed

regardless of the level of the clock input. All inputs are diode-clamped to minimize transmission-line effects, thereby simplify-

ing sysem cesign.

These counters fesure a fully independent clock cicuit, Changes at control inputs (enable B, enable , load,

up/down) that wil mocity the operating mode have no effect unl cocking occurs. Th function of the counter (whether

enable, csabid, loacing, o counting) wil be ictated soley by the conditions meeting the stable setup and ld mes.

The L553 and L559 are completely new designs. Compared 10 the orignal ‘LS168 and LS165, they feature

O-nancsecond minimum hold ime, reduced input curtents I and I, and all bufered outputs.