DSP + M0, Built-in OID Decoder, PPU for animation

The SNC7312 chip is the 32-bit CortexTM M0 processor for multi-media application.It runs up to 96MHz and optimizes ARM CMSIS Standard DSP Library. SNC7312, compareto other M0 processor, it has better audio process ability and is comparable withCMSIS DSP Library provided by ARM. SNC7312 not only supp • Power supply: 2.7~3.6V  \n• Built-in a 16-bit DSP  \n• Built-in AES unit for network security \n• 12MHz crystal or IHRC (internal high RC) type for system clock  \n• Deep power down mode (800nA)  \n• Sampling Rate: 8 / 12 / 16 / 22.05 / 24 / 32 / 44.1 /48 KHz  \n• Low Voltage Detect  \n• Multi-per;

Sonix

松翰科技

AAL1 Segmentation And Reassembly Processor

Description The AAL1 Segmentation And Reassembly (SAR) Processor (AAL1gator II™) provides DS1, E1, E3, or DS3 line interface access to an ATM Adaptation Layer One (AAL1) Constant Bit Rate (CBR) ATM network. It arbitrates access to an external SRAM for storage of the configuration, the user data,

文件：2.30048 Mbytes 页数：223 Pages

PMC

AAL1 Segmentation And Reassembly Processor

Description The AAL1 Segmentation And Reassembly (SAR) Processor (AAL1gator II™) provides DS1, E1, E3, or DS3 line interface access to an ATM Adaptation Layer One (AAL1) Constant Bit Rate (CBR) ATM network. It arbitrates access to an external SRAM for storage of the configuration, the user data,

文件：2.30048 Mbytes 页数：223 Pages

PMC

最新

TI

德州仪器

上传：深圳市金嘉锐电子有限公司

最新

TI

德州仪器

上传：君宇国际实业有限公司