丝印：LVTH16501；Package：SSOP；3.3-V ABT 18-BIT UNIVERSAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS

Members of the Texas Instruments Widebus Family UBT  Transceiver Combines D-Type Latches and D-Type Flip-Flops for Operation in Transparent, Latched, or Clocked Mode State-of-the-Art Advanced BiCMOS Technology (ABT) Design for 3.3-V Operation and Low Static-Power Dissipation Support Mi

文件：603.92 Kbytes 页数：17 Pages

TI

德州仪器

3.3-V ABT 18-BIT UNIVERSAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS

Members of the Texas Instruments Widebus Family UBT  Transceiver Combines D-Type Latches and D-Type Flip-Flops for Operation in Transparent, Latched, or Clocked Mode State-of-the-Art Advanced BiCMOS Technology (ABT) Design for 3.3-V Operation and Low Static-Power Dissipation Support Mi

文件：604.31 Kbytes 页数：17 Pages

TI

德州仪器

3.3-V ABT 18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS

文件：302.08 Kbytes 页数：10 Pages

TI

德州仪器

Low Voltage 18-Bit Universal Bus Transceivers with 3-STATE Outputs Preliminary

General Description The LVTH16501 is an 18-bit universal bus transceiver combining D-type latches and D-type flip-flops to allow data flow in transparent, latched, and clocked modes. Data flow in each direction is controlled by output-enable (OEAB and OEBA), latch-enable (LEAB and LEBA), and clo

文件：64.739 Kbytes 页数：7 Pages

Fairchild

仙童半导体

Low Voltage 18-Bit Universal Bus Transceivers with 3-STATE Outputs Preliminary

General Description The LVTH16501 is an 18-bit universal bus transceiver combining D-type latches and D-type flip-flops to allow data flow in transparent, latched, and clocked modes. Data flow in each direction is controlled by output-enable (OEAB and OEBA), latch-enable (LEAB and LEBA), and clo

文件：64.739 Kbytes 页数：7 Pages

Fairchild

仙童半导体

Low Voltage 18-Bit Universal Bus Transceivers with 3-STATE Outputs Preliminary

General Description The LVTH16501 is an 18-bit universal bus transceiver combining D-type latches and D-type flip-flops to allow data flow in transparent, latched, and clocked modes. Data flow in each direction is controlled by output-enable (OEAB and OEBA), latch-enable (LEAB and LEBA), and clo

文件：64.739 Kbytes 页数：7 Pages

Fairchild

仙童半导体