SN74LVT125QDRG4Q1集成电路（IC）的缓冲器驱动器接收器收发器规格书PDF中文资料

SN74LVT125QDRG4Q1属于集成电路（IC）的缓冲器驱动器接收器收发器。由美国德州仪器公司制造生产的SN74LVT125QDRG4Q1缓冲器，驱动器，接收器，收发器逻辑缓冲器、驱动器、接收器和收发器允许隔离对某个电路的逻辑信号的访问，以用于另一电路。缓冲器将其输入信号（不变或反相）传递到其输出，并可能用于清除弱信号或驱动负载。在布尔逻辑仿真器中，缓冲器主要用于增加传播延迟。逻辑接收器和收发器允许在数据总线之间进行隔离通信。

1FEATURES

· Qualified for Automotive Applications

· ESD Protection Exceeds 2000 V Per

MIL-STD-883, Method 3015; Exceeds 200 V

Using Machine Model (C = 200 pF, R = 0)

· Supports Mixed-Mode Signal Operation (5-V

Input and Output Voltages With 3.3-V VCC)

· Supports Unregulated Battery Operation Down

to 2.7 V

· Typical VOLP (Output Ground Bounce)

<0.8 V at VCC = 3.3 V, TA = 25°C

· Ioff Supports Partial-Power-Down Mode

Operation

· Bus-Hold Data Inputs Eliminate the Need for

External Pullup Resistors

DESCRIPTION/ORDERING INFORMATION

SN74LVT125-Q1

www.ti.com....................................................................................................................................................... SCBS763B–AUGUST 2003–REVISED APRIL 2008

3.3-V ABT QUADRUPLE BUS BUFFER

WITH 3-STATE OUTPUTS

· Qualified for Automotive Applications

· ESD Protection Exceeds 2000 V Per

MIL-STD-883, Method 3015; Exceeds 200 V

Using Machine Model (C = 200 pF, R = 0)

· Supports Mixed-Mode Signal Operation (5-V

Input and Output Voltages With 3.3-V VCC)

· Supports Unregulated Battery Operation Down

to 2.7 V

· Typical VOLP (Output Ground Bounce)

<0.8 V at VCC = 3.3 V, TA = 25°C

· Ioff Supports Partial-Power-Down Mode

Operation

· Bus-Hold Data Inputs Eliminate the Need for

External Pullup Resistors

This bus buffer is designed specifically for low-voltage (3.3-V) VCC operation, but with the capability to provide a

TTL interface to a 5-V system environment.

The SN74LVT125-Q1 features independent line drivers with 3-state outputs. Each output is in the

high-impedance state when the associated output-enable (OE) input is high.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors

with the bus-hold circuitry is not recommended.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,

preventing damaging current backflow through the device when it is powered down.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.