SN74LVCZ16245ADGVR集成电路（IC）的缓冲器驱动器接收器收发器规格书PDF中文资料

SN74LVCZ16245ADGVR属于集成电路（IC）的缓冲器驱动器接收器收发器。由美国德州仪器公司制造生产的SN74LVCZ16245ADGVR缓冲器，驱动器，接收器，收发器逻辑缓冲器、驱动器、接收器和收发器允许隔离对某个电路的逻辑信号的访问，以用于另一电路。缓冲器将其输入信号（不变或反相）传递到其输出，并可能用于清除弱信号或驱动负载。在布尔逻辑仿真器中，缓冲器主要用于增加传播延迟。逻辑接收器和收发器允许在数据总线之间进行隔离通信。

Member of the Texas Instruments

Widebus Family

Operates From 2.7 V to 3.6 V

Inputs Accept Voltages to 5.5 V

Max tpd of 3.7 ns at 3.3 V

Ioff and Power-Up 3-State Support Hot

Insertion

Supports Mixed-Mode Signal Operation on

All Ports (5-V Input/Output Voltage With

3.3-V VCC)

Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

ESD Protection Exceeds JESD 22

– 2000-V Human-Body Model (A114-A)

– 1000-V Charged-Device Model (C101)

description/ordering information

This 16-bit (dual-octal) noninverting bus

transceiver is designed for 2.7-V to 3.6-V VCC

operation.

The SN74LVCZ16245A is designed for

asynchronous communication between data

buses. The control-function implementation

minimizes external timing requirements.

This device can be used as two 8-bit transceivers

or one 16-bit transceiver. It allows data

transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the

direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so that the buses

are effectively isolated.

Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators

in a mixed 3.3-V/5-V system environment.

When VCC is between 0 and 1.5 V, the device is in the high-impedance state during power up or power down.

However, to ensure the high-impedance state above 1.5 V, OE should be tied to VCC through a pullup resistor;

the minimum value of the resistor is determined by the current-sinking capability of the driver.